TMP92xy29FG Toshiba, TMP92xy29FG Datasheet - Page 191
TMP92xy29FG
Manufacturer Part Number
TMP92xy29FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP92XY29FG.pdf
(764 pages)
Specifications of TMP92xy29FG
Package
QFP176
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
98
Power Supply Voltage(v)
3.0 to 3.6
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CS space
CS0
CS1
CS2
CS3
Note: The “ Δ ” symbol indicates the sizes that may not be programmable depending on the combination of the values
(Byte)
(e) Priorities of the address spaces
(f) Specifying the number of wait states and the bus width for the address locations
Size
of the Memory Start Address and Memory Address Mask registers.
priority order of the address spaces are as follows:
states when an address outside the CS0 to CS3 spaces (
registers are always enabled for the CSEX space.
outside the CS0 to CS3 spaces
When the specified address space overlaps with the on-chip memory area, the
The BEXCSL and BEXCSH registers specify the data bus width and number of wait
256
○
○
On-chip I/O > On-chip memory > CS0 space > CS1 space > CS2 space > CS3 space
512
Table 3.9.3 Valid Block Sizes for Each CS Space
○
○
32 K
○
○
○
64 K
○
○
○
○
92CF29A-189
128 K 256 K 512 K
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
Δ
1 M
Δ
Δ
Δ
Δ
CSEX
2 M
space) is accessed. These
Δ
Δ
Δ
Δ
4 M
Δ
Δ
Δ
TMP92CF29A
2009-06-11
8 M
Δ
Δ
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