IDT88K8483 Integrated Device Technology, IDT88K8483 Datasheet - Page 153

• Manufacturer Part Number: IDT88K8483
• Description: Spi-4 Exchange Document Issue 1.0
• Manufacturer: Integrated Device Technology

Timing Diagram
IDT IDT88K8483
SCLK Frequency
Min. /CS High Time
/CS Setup Time
/CS Hold Time
Clock Disable Time
Clock High Time
Clock Low Time
Data Setup Time
Data Hold Time
Output Delay
Output Disable Time
JTAG Interface.
TCK frequency
TCK duty cycle
TMS setup
TMS hold
TDI setup
TDI hold
TCK low to TDO valid
1.
2.
TCi[0:1] field in the
CTLTC[0:1] field in the
DCTC[0:1] field in the
STCi[0:1] field in the
SCTC[0:3] field in the
Tmax = 1000/Fmin.
This value is programmable by
Parameter
Figure 54 JTAG Interface p.158
SPI-4 Egress Data Lane Timing Register (p. 118)
SPI-4 Egress Status Timing Register (p. 119)
SPI-4 Egress Data Clock Timing Register (p. 119)
SPI-4 Egress Status Clock Timing Register (p. 120),
SPI-4 Egress Data Control Lane Timing Register (p. 118)
tPtdo
fOP
tCSH
tCSS
tCSD
tCLD
tCLH
tCLL
tDIS
tDIH
tPD
tDF
tStms
tHtms
tSdti
tHdti
Symbol
Table 168 AC Characteristics (Part 4 of 4)
.
153 of 162
Conditions
100
50
100
50
205
205
50
150
40
20
20
20
20
2
Min
Typ
2.0
150
50
10
60
50
Max
October 20, 2006
1
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
%
ns
ns
ns
ns
ns
ns
Unit