IDT88K8483 Integrated Device Technology, IDT88K8483 Datasheet - Page 58

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IDT88K8483

Manufacturer Part Number
IDT88K8483
Description
Spi-4 Exchange Document Issue 1.0
Manufacturer
Integrated Device Technology
Datasheet
pressure.
Impedance Matching Control
iary interface egress data and control signals according to the 100 OHM pull down resistor that is connected to the QDR_IMP external signal.
IDT IDT88K8483
Framer
An application example for flow control mode 2 is described in
The auxiliary interface egress side has impedance matching control. It has on chip test circuit that automatically adjusts the impedance of the auxil-
status
data
Interface
Ingress
SPI-4
Interleaved
Channels
Ingress
Buffer
SPI-4
Port
Figure 26 QDR-II Flow Control Example For Buffering Option
Figure 27 Flow Control Mode 2 Application Example
QDR-II (8K segments, 2M bytes, 16M bits)
508 segments
127K bytes
Ingress
PFP
Figure
58 of 162
satisfied
Starving
satisfied
Starving
Hungry
Hungry
8K segments
Interleaving
2M bytes
22. In this case there is no over-booking, and there can be frequent back-
QDR-II
Non-Interleaved
Channels
Early Back Pressure Free Segment per LID 1 = 100
Second Free Segments for LID 1 = 6
Second Free Segments per LID 0 = 6
Early Back Pressure Free Segments per LID 0 = 100
Maximum Number Of Segments for LID 1 = 128
Maximum Number Of Segments for LID 0 = 128
508 segments
127K bytes
Egress
PFP
Egress
Buffer
SPI-4
Port
Interface
Egress
SPI-4
October 20, 2006
status
data
NP

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