XC2S100E-7PQ208C Xilinx, Inc., XC2S100E-7PQ208C Datasheet - Page 14

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XC2S100E-7PQ208C

Manufacturer Part Number
XC2S100E-7PQ208C
Description
100000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN
Manufacturer
Xilinx, Inc.
Datasheet

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Boundary-scan operation is independent of individual IOB
configurations, and unaffected by package type. All IOBs,
including unbonded ones, are treated as independent
3-state bidirectional pins in a single scan chain. Retention of
the bidirectional test capability after configuration facilitates
the testing of external interconnections.
Table 7
Spartan-II FPGAs. Internal signals can be captured during
EXTEST by connecting them to unbonded or unused IOBs.
They may also be connected to the unused outputs of IOBs
defined as unidirectional input pins.
Table 7: Boundary-Scan Instructions
DS001-2 (v2.8) June 13, 2008
Product Specification
Boundary-Scan
RESERVED
USRCODE
Command
CFG_OUT
SAMPLE
EXTEST
IDCODE
BYPASS
CFG_IN
INTEST
JSTART
USR1
USR2
HIZ
lists the boundary-scan instructions supported in
R
Code[4:0]
All other
Binary
01000
00000
00001
00010
00011
00100
00101
00111
01001
01010
01100
11111
codes
Enables boundary-scan
Enables boundary-scan
Enables boundary-scan
Enables shifting out of
Access user-defined
Access user-defined
configuration bus for
configuration bus for
Disables output pins
Enables shifting out
SAMPLE operation
EXTEST operation
INTEST operation
while enabling the
StartupClk is TCK
Clock the start-up
Enables BYPASS
Bypass Register
sequence when
Xilinx
Configuration
Description
USER code
instructions
Access the
Access the
Readback
register 1
register 2
ID Code
®
reserved
www.xilinx.com
The public boundary-scan instructions are available prior to
configuration. After configuration, the public instructions
remain available together with any USERCODE
instructions installed during the configuration. While the
SAMPLE and BYPASS instructions are available during
configuration, it is recommended that boundary-scan
operations not be performed during this transitional period.
In addition to the test instructions outlined above, the
boundary-scan circuitry can be used to configure the FPGA,
and also to read back the configuration data.
To facilitate internal scan chains, the User Register
provides three outputs (Reset, Update, and Shift) that
represent the corresponding states in the boundary-scan
internal state machine.
Spartan-II FPGA Family: Functional Description
Module 2 of 4
14

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