XC2S100E-7PQ208C Xilinx, Inc., XC2S100E-7PQ208C Datasheet - Page 3

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XC2S100E-7PQ208C

Manufacturer Part Number
XC2S100E-7PQ208C
Description
100000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN
Manufacturer
Xilinx, Inc.
Datasheet

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General Overview
The Spartan-II family of FPGAs have a regular, flexible,
programmable architecture of Configurable Logic Blocks
(CLBs), surrounded by a perimeter of programmable
Input/Output Blocks (IOBs). There are four Delay-Locked
Loops (DLLs), one at each corner of the die. Two columns
of block RAM lie on opposite sides of the die, between the
CLBs and the IOB columns. These functional elements are
interconnected by a powerful hierarchy of versatile routing
channels (see
Spartan-II FPGAs are customized by loading configuration
data into internal static memory cells. Unlimited
reprogramming cycles are possible with this approach.
Stored values in these cells determine logic functions and
interconnections implemented in the FPGA. Configuration
data can be read from an external serial PROM (master
DS001-1 (v2.8) June 13, 2008
Product Specification
R
Figure
1).
I/O LOGIC
DLL
DLL
Figure 1: Basic Spartan-II Family FPGA Block Diagram
CLBs
CLBs
www.xilinx.com
Spartan-II FPGA Family: Introduction and Ordering Information
XC2S15
serial mode), or written into the FPGA in slave serial, slave
parallel, or Boundary Scan modes.
Spartan-II FPGAs are typically used in high-volume
applications where the versatility of a fast programmable
solution adds benefits. Spartan-II FPGAs are ideal for
shortening product development cycles while offering a
cost-effective solution for high volume production.
Spartan-II FPGAs achieve high-performance, low-cost
operation through advanced architecture and
semiconductor technology. Spartan-II devices provide
system clock rates up to 200 MHz. In addition to the
conventional benefits of high-volume programmable logic
solutions, Spartan-II FPGAs also offer on-chip synchronous
single-port and dual-port RAM (block and distributed form),
DLL clock drivers, programmable set and reset on all
flip-flops, fast carry logic, and many other features.
CLBs
CLBs
DLL
DLL
DS001_01_091800
Module 1 of 4
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