XC2S100E-7PQ208C Xilinx, Inc., XC2S100E-7PQ208C Datasheet - Page 44

• Manufacturer Part Number: XC2S100E-7PQ208C
• Description: 100000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN
• Manufacturer: Xilinx, Inc.

GTL
A sample circuit illustrating a valid termination technique for
GTL is shown in
specifications for the GTL standard. See
Specifications"
characteristics.
Table 20: GTL Voltage Specifications
GTL+
A sample circuit illustrating a valid termination technique for
GTL+ appears in
appear in
Specifications"
characteristics.
DS001-2 (v2.8) June 13, 2008
Product Specification
Notes:
1.
V
V
V
V
V
V
V
I
I
I
OH
OL
OL
OH
OL
CCO
REF
TT
IH
IL
N must be greater than or equal to 0.653 and less than or
equal to 0.68.
≤ V
at V
at V
≥ V
GTL
at V
GTL+
V
V
= N × V
CCO
CCO
REF
OL
OL
REF
Parameter
OH
Table 21
(mA) at 0.4V
(mA) at 0.2V
= NA
= NA
R
(mA)
+ 0.05
– 0.05
Figure 43: Terminated GTL+
TT
Figure 42: Terminated GTL
in Module 3 for the actual FPGA
in Module 3 for the actual FPGA
(1)
Figure
50Ω
50Ω
V
V
Figure
TT
TT
for the GTL+ standard. See
= 1.2V
= 1.5V
42.
43. DC voltage specifications
Table 20
Z = 50
Z = 50
0.74
1.14
0.79
V
Min
V
32
REF
REF
-
-
-
-
-
-
lists DC voltage
= 0.8V
= 1.0V
50Ω
50Ω
V
V
TT
TT
"DC
= 1.2V
= 1.5V
0.85
0.75
Typ
N/A
0.8
1.2
0.2
-
-
-
-
DS001_43_061200
DS001_43_061200
"DC
Max
0.86
1.26
0.81
0.4
40
-
-
-
-
-
www.xilinx.com
Table 21: GTL+ Voltage Specifications
HSTL Class I
A sample circuit illustrating a valid termination technique for
HSTL_I appears in
appear in
Specifications"
characteristics.
Table 22: HSTL Class I Voltage Specification
Notes:
1.
V
V
V
V
V
V
V
I
I
I
V
V
V
V
V
V
V
I
I
OH
OL
OL
OH
OL
OH
OL
OH
OL
CCO
REF
TT
IH
IL
CCO
REF
TT
IH
IL
Parameter
N must be greater than or equal to 0.653 and less than or
equal to 0.68.
≤ V
at V
at V
at V
≥ V
at V
HSTL Class I
at V
= N × V
V
Parameter
Spartan-II FPGA Family: Functional Description
REF
CCO
REF
OL
OL
OL
OH
OH
Table 22
Figure 44: Terminated HSTL Class I
(mA) at 0.6V
(mA) at 0.3V
(mA)
(mA)
= 1.5V
(mA)
– 0.1
+ 0.1
TT
in Module 3 for the actual FPGA
(1)
for the HSTL_1 standard. See
V
Figure
V
CCO
REF
1.40
0.68
Min
–8
8
-
-
+ 0.1
– 0.4
44. DC voltage specifications
Z = 50
0.88
1.35
0.98
Min
0.3
36
-
-
-
-
-
V
REF
V
CCO
= 0.75V
1.50
0.75
Typ
V
50Ω
-
-
-
-
-
TT
× 0.5
0.45
Typ
1.0
1.5
1.1
0.9
= 0.75V
-
-
-
-
-
DS001_44_061200
V
Module 2 of 4
REF
"DC
Max
1.60
0.90
0.4
Max
1.12
1.65
1.02
0.6
-
-
-
-
-
48
– 0.1
-
-
-
-
-
44