XC2S100E-7PQ208C Xilinx, Inc., XC2S100E-7PQ208C Datasheet - Page 63

• Manufacturer Part Number: XC2S100E-7PQ208C
• Description: 100000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN
• Manufacturer: Xilinx, Inc.

DS001-3 (v2.8) June 13, 2008
Product Specification
Output Jitter: the difference between an ideal
reference clock edge and the actual design.
Period Tolerance: the allowed input clock period change in nanoseconds.
R
Ideal Period
Actual Period
T
CLKIN
=
F CLKIN
1
Figure 52: Period Tolerance and Clock Jitter
www.xilinx.com
T CLKIN + T IPTOL
Spartan-II FPGA Family: DC and Switching Characteristics
Phase Offset and Maximum Phase Difference
_
+/- Jitter
+ Maximum
+ Phase Offset
Phase Difference
DS001_52_090800
Module 3 of 4
63