XC2S100E-7PQ208C Xilinx, Inc., XC2S100E-7PQ208C Datasheet - Page 98

• Manufacturer Part Number: XC2S100E-7PQ208C
• Description: 100000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN
• Manufacturer: Xilinx, Inc.

XC2S200 Device Pinouts (Continued)
DS001-4 (v2.8) June 13, 2008
Product Specification
Notes:
1.
2.
3.
GND
I/O
I/O, V
I/O
I/O
GND
I/O
I/O
I/O
I/O
I/O, V
V
GND
I/O
I/O
I/O
I/O
I/O, V
GND
I/O
I/O
I/O
I/O
TCK
V
V
04/18/01
CCO
CCO
CCO
XC2S200 Pad Name
Function
IRDY and TRDY can only be accessed when using Xilinx PCI
cores.
Pads labelled GND*, V
V
V
independent ground or power planes within the package.
See
REF
REF
REF
CCO
CCO
"VCCO Banks"
Bank 2*, V
Bank 6*, V
R
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
7
-
-
-
-
-
CCO
CCO
for details on V
Bank 3*, V
Bank 7* are internally bonded to
PQ208
CCINT
P199
P200
P201
P202
P203
P204
P205
P206
P207
P208
P208
P198
-
-
-
-
-
-
-
-
-
-
-
-
-
-
*, V
CCO
CCO
Bank 0*
Bank 0*
Bank 7*
FG256
GND*
GND*
GND*
GND*
V
V
V
A5
C6
B5
D6
A4
B4
E6
D5
A3
C5
B3
C4
CCO
CCO
CCO
CCO
-
-
-
-
-
-
-
Bank 0*, V
Bank 4*, V
banking.
Bank 0*
Bank 0*
Bank 7*
FG456
GND*
GND*
GND*
GND*
V
V
V
B7
E8
D8
C7
D7
B6
A5
D6
C6
B5
E7
A4
E6
B4
A3
B3
D5
C5
C4
CCO
CCO
CCO
CCO
CCO
Bank 1*,
Bank 5*,
Bndry
Scan
188
191
197
200
203
206
209
212
215
218
221
224
230
233
236
239
242
248
www.xilinx.com
-
-
-
-
-
-
-
-
Additional XC2S200 Package Pins
PQ208
11/02/00
FG256
G10
P55
H11
J11
F10
L10
M5
C3
E8
E9
H5
A1
K8
P4
L9
L8
J5
J7
M12
P56
C14
H12
A16
G11
F11
L11
J12
M9
M8
H6
R4
F8
F9
K9
J6
J8
Spartan-II FPGA Family: Pinout Tables
Not Connected Pins
Not Connected Pins
V
V
V
V
V
V
V
V
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
K10
D4
N4
G6
H7
R2
B2
J9
V
-
-
-
-
-
-
-
-
-
-
GND Pins
CCINT
Bank 0 Pins
Bank 1 Pins
Bank 2 Pins
Bank 3 Pins
Bank 4 Pins
Bank 5 Pins
Bank 6 Pins
Bank 7 Pins
Pins
D13
N13
B15
K11
R15
J10
G7
H8
-
-
-
-
-
-
-
-
-
-
E5
P3
G8
H9
K6
F6
L6
T1
-
-
-
-
-
-
-
-
-
-
Module 4 of 4
H10
E12
P14
T16
G9
F7
K7
L7
-
-
-
-
-
-
-
-
-
-
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