XC2S100E-7PQ208C Xilinx, Inc., XC2S100E-7PQ208C Datasheet - Page 99

• Manufacturer Part Number: XC2S100E-7PQ208C
• Description: 100000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN
• Manufacturer: Xilinx, Inc.

Additional XC2S200 Package Pins (Continued)
Revision History
DS001-4 (v2.8) June 13, 2008
Product Specification
11/02/00
FG456
Version
G17
M16
F13
T12
T10
G9
M7
E5
T7
U6
F7
No.
J7
2.0
2.1
2.2
2.3
2.4
2.5
2.8
R
09/18/00
10/04/00
11/02/00
03/05/01
04/30/01
09/03/03
06/13/08
G14
E18
U17
H17
N16
J16
F14
T13
T11
N6
T8
F8
Date
V
V
V
V
V
V
V
V
CCO
CCO
CCO
CCO
CCO
CCO
CCO
CCO
G15
N17
U13
F15
J17
U7
N7
F6
P7
T9
V5
F9
Sectioned the Spartan-II Family data sheet into four modules. Corrected all known errors in the pinout tables.
Added notes requiring PWDN to be tied to V
Removed the Power Down feature.
Added notes on pinout tables for IRDY and TRDY.
Reinstated XC2S50 V
Added caution about Not Connected Pins to XC2S30 pinout tables on
Added
Updated all modules for continuous page, figure, and table numbering. Synchronized all modules to v2.8.
V
CCINT
Bank 0 Pins
Bank 1 Pins
Bank 2 Pins
Bank 3 Pins
Bank 4 Pins
Bank 5 Pins
Bank 6 Pins
Bank 7 Pins
"Package Overview"
Pins
G16
F17
P16
T14
V18
F10
F16
K16
P17
U14
U8
P6
G10
G12
K17
R17
U15
T15
G7
H7
R7
U9
R6
CCO
-
Bank 7, GND, and "not connected" pins missing in version 2.3.
section. Added notes to clarify shared V
H16
R16
G11
G13
U16
U10
T16
L16
T17
G8
T6
-
www.xilinx.com
Additional XC2S200 Package Pins (Continued)
CCINT
11/02/00
AA16
W19
G6
M9
G2
A1
K9
N9
P9
Y3
A2
D1
R3
J9
L9
Description
when unused.
M10
A22
K10
N10
P10
Y20
G22
R20
AB7
L10
J10
H6
A6
D4
Y5
Spartan-II FPGA Family: Pinout Tables
Not Connected Pins
CCO
AB12
M11
N11
AA2
D18
K11
P11
A12
Y22
J11
L11
U3
B2
page
J6
L2
banks. Updated description and links.
GND Pins
76.
AA21
AB21
M12
AA1
B21
K12
N12
P12
B11
D19
U18
J12
L12
L19
K6
M13
N13
AB1
B16
AA3
K13
L13
P13
E17
J13
M2
K7
C3
V6
-
Module 4 of 4
AB22
AA11
C20
M14
N14
M21
K14
P14
E19
J14
L14
W4
C2
L7
-
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