ata6616 ATMEL Corporation, ata6616 Datasheet - Page 111

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ata6616

Manufacturer Part Number
ata6616
Description
Microcontroller With Lin Transceiver, 5v Regulator And Watchdog
Manufacturer
ATMEL Corporation
Datasheet

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Figure 4-30. 8-bit Timer/Counter0 Block Diagram
9132A–AUTO–10/08
DRAFT
Status flags
Timer/Counter
The Timer/Counter (TCNT0) and Output Compare Register (OCR0A) are 8-bit registers. Inter-
rupt request (shorten as Int.Req.) signals are all visible in the Timer Interrupt Flag Register
(TIFR0). All interrupts are individually masked with the Timer Interrupt Mask Register (TIMSK0).
TIFR0 and TIMSK0 are not shown in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or asynchronously clocked from
the XTAL1/2 pins, as detailed later in this section. The asynchronous operation is controlled by
the Asynchronous Status Register (ASSR). The Clock Select logic block controls which clock
source the Timer/Counter uses to increment (or decrement) its value. The Timer/Counter is inac-
tive when no clock source is selected. The output from the Clock Select logic is referred to as the
timer clock (clk
The double buffered Output Compare Register (OCR0A) is compared with the Timer/Counter
value at all times. The result of the compare can be used by the Waveform Generator to gener-
ate a PWM or variable frequency output on the Output Compare pin (OC0A).
Compare Unit” on page 113.
(OCF0A) which can be used to generate an Output Compare interrupt request.
TCNTn
OCRnx
=
ASSRn
direction
count
clear
T0
BOTTOM
).
Synchronized Status flags
= 0
Control Logic
=
TCCRnx
TOP
asynchronous mode
for details. The compare match event will also set the compare flag
0xFF
select (ASn)
ATA6616/ATA6617 [Preliminary]
clk
Tn
Synchronization Unit
Prescaler
OCnx
(Int.Req.)
Generation
Waveform
Oscillator
clk
TOVn
(Int.Req.)
OCnx
clk
clk
ASY
I/O
I/O
XTAL1
XTAL2
See ”Output
111

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