ata6616 ATMEL Corporation, ata6616 Datasheet - Page 230
ata6616
Manufacturer Part Number
ata6616
Description
Microcontroller With Lin Transceiver, 5v Regulator And Watchdog
Manufacturer
ATMEL Corporation
Datasheet
1.ATA6616.pdf
(310 pages)
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ATA6616/ATA6617 [Preliminary]
• Bit 5 – ADLAR: ADC Left Adjust Result
The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data Register.
Write one to ADLAR to left adjust the result. Otherwise, the result is right adjusted. Changing the
ADLAR bit will affect the ADC Data Register immediately, regardless of any ongoing conver-
sions. For a complete description of this bit, see
page
• Bits 4:0 – MUX4:0: Analog Channel and Gain Selection Bits
These bits select which combination of analog inputs are connected to the ADC. In case of dif-
ferential input, gain selection is also made with these bits. Refer to
these bits are changed during a conversion, the change will not go into effect until this
conversion is complete (ADIF in ADCSRA register is set).
Table 4-58.
MUX[4..0]
232.
0 0000
0 0001
0 0010
0 0011
0 0100
0 0101
0 0110
0 0111
0 1000
0 1001
0 1010
0 1011
0 1100
0 1101
0 1110
0 1111
Input Channel Selections
Bandgap Reference (1.1 V)
Single Ended Input
Temperature Sensor
ADC7 / XREF (PA7)
ADC3 / ISRC (PA3)
ADC10 (PB7)
ADC8 (PB5)
ADC9 (PB6)
ADC0 (PA0)
ADC1 (PA1)
ADC2 (PA2)
ADC4 (PA4)
ADC5 (PA5)
ADC6 (PA6)
(reserved)
GND (0V)
AVcc/4
“ADCL and ADCH – The ADC Data Register” on
DRAFT
Differential Input
Positive
NA
Differential Input
Table 4-58
Negative
NA
9132A–AUTO–10/08
for details. If
Gain
NA
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