ata6616 ATMEL Corporation, ata6616 Datasheet - Page 183

• Manufacturer Part Number: ata6616
• Description: Microcontroller With Lin Transceiver, 5v Regulator And Watchdog
• Manufacturer: ATMEL Corporation

4.15.5.4
9132A–AUTO–10/08
DRAFT
USICR – USI Control Register
The Control Register includes interrupt enable control, wire mode setting, Clock Select setting,
and clock strobe.
• Bit 7 – USISIE: Start Condition Interrupt Enable
Setting this bit to one enables the Start Condition detector interrupt. If there is a pending inter-
rupt when the USISIE and the Global Interrupt Enable Flag is set to one, this will immediately be
executed. Refer to the USISIF bit description on page 182 for further details.
• Bit 6 – USIOIE: Counter Overflow Interrupt Enable
Setting this bit to one enables the Counter Overflow interrupt. If there is a pending interrupt when
the USIOIE and the Global Interrupt Enable Flag is set to one, this will immediately be executed.
Refer to the USIOIF bit description on page 182 for further details.
• Bit 5:4 – USIWM1:0: Wire Mode
These bits set the type of wire mode to be used. Basically only the function of the outputs are
affected by these bits. Data and clock inputs are not affected by the mode selected and will
always have the same function. The counter and USI Data Register can therefore be clocked
externally, and data input sampled, even when outputs are disabled. The relations between
USIWM1:0 and the USI operation is summarized in
Bit
Read/Write
Initial Value
USISIE
R/W
7
0
USIOIE
R/W
6
0
USIWM1
ATA6616/ATA6617 [Preliminary]
R/W
5
0
USIWM0
R/W
4
0
Table
USICS1
R/W
3
0
4-44.
USICS0
R/W
2
0
USICLK
W
1
0
USITC
W
0
0
USICR
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