ata6616 ATMEL Corporation, ata6616 Datasheet - Page 158
ata6616
Manufacturer Part Number
ata6616
Description
Microcontroller With Lin Transceiver, 5v Regulator And Watchdog
Manufacturer
ATMEL Corporation
Datasheet
1.ATA6616.pdf
(310 pages)
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ATA6616/ATA6617 [Preliminary]
Table 4-35
PWM mode.
Table 4-35.
Table 4-36
correct or the phase and frequency correct, PWM mode.
Table 4-36.
• Bit 3:2 – Reserved Bits
These bits are reserved for future use.
• Bit 1:0 – WGM11:0: Waveform Generation Mode
Combined with the WGM13:2 bits found in the TCCR1B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
unit are: Normal mode (counter), Clear Timer on Compare match (CTC) mode, and three types
of Pulse Width Modulation (PWM) modes.
Note:
Note:
OC1Ai
OC1Bi
OC1Ai
OC1Bi
0
1
1
1
1
0
1
1
1
1
1. A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is set. In
1. A special case occurs when OC1A/OC1B equals TOP and COM1A1/COM1B1 is set.
shows the COM1A/B1:0 bit functionality when the WGM13:0 bits are set to the phase
shows the COM1A/B1:0 bit functionality when the WGM13:0 bits are set to the fast
this case the compare match is ignored, but the set or clear is done at TOP.
Mode” on page 149.
“Phase Correct PWM Mode” on page 151.
COM1A1
COM1B1
COM1A1
COM1B1
Compare Output Mode, Fast PWM
Compare Output Mode, Phase Correct and Phase and Frequency Correct
PWM
x
0
0
1
1
x
0
0
1
1
(1)
COM1A0
COM1B0
COM1A0
COM1B0
0
1
0
1
0
1
0
1
x
x
for more details.
Table
Description
Normal port operation, OC1A/OC1B disconnected.
WGM13=0: Normal port operation, OC1A/OC1B disconnected.
WGM13=1: Toggle OC1A on Compare Match, OC1B reserved.
Clear OC1A/OC1B on Compare Match
Set OC1A/OC1B at TOP
Set OC1A/OC1B on Compare Match
Clear OC1A/OC1B at TOP
Description
Normal port operation, OC1A/OC1B disconnected.
WGM13=0: Normal port operation, OC1A/OC1B disconnected.
WGM13=1: Toggle OC1A on Compare Match, OC1B reserved.
Clear OC1A/OC1B on Compare Match when up-counting.
Set OC1A/OC1B on Compare Match when downcounting.
Set OC1A/OC1B on Compare Match when up-counting.
Clear OC1A/OC1B on Compare Match when downcounting.
4-37. Modes of operation supported by the Timer/Counter
(See “Modes of Operation” on page
DRAFT
(1)
for more details.
147.).
See “Fast PWM
9132A–AUTO–10/08
See
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