ata6616 ATMEL Corporation, ata6616 Datasheet - Page 93
ata6616
Manufacturer Part Number
ata6616
Description
Microcontroller With Lin Transceiver, 5v Regulator And Watchdog
Manufacturer
ATMEL Corporation
Datasheet
1.ATA6616.pdf
(310 pages)
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4.10.2.4
4.10.2.5
9132A–AUTO–10/08
DRAFT
Switching Between Input and Output
Reading the Pin Value
W h e n s w i t c h i n g b e t w e e n t r i - s t a t e ( { D D x n , P O R T x n } = 0 , 0 ) a n d o u t p u t h i g h
( { D D x n , P O R T x n } = 1 , 1 ) , a n i n t e r m e d i a t e s t a t e w i t h e i t h e r p u l l - u p e n a b l e d
{DDxn, PORTxn} = 0, 1) or output low ({DDxn, PORTxn} = 1, 0) must occur. Normally, the
pull-up enabled state is fully acceptable, as a high-impedant environment will not notice the dif-
ference between a strong high driver and a pull-up. If this is not the case, the PUD bit in the
MCUCR Register or the PUDx bit in PORTCR Register can be set to disable all pull-ups in the
port.
Switching between input with pull-up and output low generates the same problem. The user
m u s t u s e e i t h e r t h e t r i - s t a t e ( { D D x n , P O R T x n } = 0 , 0 ) o r t h e o u t p u t h i g h s t a t e
({DDxn, PORTxn} = 1, 1) as an intermediate step.
Table 4-21
Table 4-21.
Independent of the setting of Data Direction bit DDxn, the port pin can be read through the
PINxn Register bit. As shown in
stitute a synchronizer. This is needed to avoid metastability if the physical pin changes value
near the edge of the internal clock, but it also introduces a delay.
gram of the synchronization when reading an externally applied pin value. The maximum and
minimum propagation delays are denoted t
Figure 4-27. Synchronization when Reading an Externally Applied Pin Value
Note:
DDxn
0
0
0
1
1
1. Or port-wise PUDx bit in PORTCR register.
PORTxn
summarizes the control signals for the pin value.
INSTRUCTIONS
SYSTEM CLK
SYNC LATCH
Port Pin Configurations
0
1
1
0
1
PINxn
(in MCUCR)
r17
PUD
X
X
X
0
1
Figure
ATA6616/ATA6617 [Preliminary]
(1)
XXX
4-25, the PINxn Register bit and the preceding latch con-
Output
Output
Input
Input
Input
I/O
pd,max
t
pd, max
and t
Pull-up Comment
0x00
Yes
No
No
No
No
XXX
pd,min
t
pd, min
Tri-state (Hi-Z)
Pxn will source current if ext. pulled low.
Tri-state (Hi-Z)
Output Low (Sink)
Output High (Source)
respectively.
in r17, PINx
Figure 4-27
shows a timing dia-
0xFF
93
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