ata6616 ATMEL Corporation, ata6616 Datasheet - Page 194

• Manufacturer Part Number: ata6616
• Description: Microcontroller With Lin Transceiver, 5v Regulator And Watchdog
• Manufacturer: ATMEL Corporation

4.16.5
4.16.5.1
4.16.5.2
4.16.5.3
194
ATA6616/ATA6617 [Preliminary]
LIN / UART Description
Reset
Clock
LIN Protocol Selection
The AVR core reset logic signal also resets the LIN/UART controller. Another form of reset
exists, a software reset controlled by LSWRES bit in LINCR register. This self-reset bit performs
a partial reset as shown in
Table 4-48.
The I/O clock signal (clk
LIN13 bit in LINCR register is used to select the LIN protocol:
The controller checks the LIN13 bit in computing the checksum (enhanced checksum in LIN2.1 /
classic checksum in LIN 1.3).
This bit is irrelevant for UART commands.
• LIN13 = 0 (default): LIN 2.1 protocol,
• LIN13 = 1: LIN 1.3 protocol.
LIN Status & Interrupt Reg.
LIN Enable Interrupt Reg.
LIN Baud Rate Reg. High
LIN Data Buffer Selection
LIN Baud Rate Reg. Low
LIN Data Length Reg.
LIN Bit Timing Reg.
LIN Identifier Reg.
LIN Control Reg.
LIN Error Reg.
Register
LIN Data
Reset of LIN/UART Registers
i/o
) also clocks the LIN/UART controller. It is its unique clock.
Table
LINBRRH
LINBRRL
LINENIR
4-48.
LINERR
LINBTR
LINDLR
LINSEL
LINDAT
LINSIR
LINIDR
LINCR
Name
Reset Value
0000 0000
0000 0000
0000 0000
0000 0000
0010 0000
0000 0000
0000 0000
0000 0000
1000 0000
0000 0000
0000 0000
DRAFT
b
b
b
b
b
b
b
b
b
b
b
LSWRES Value
0000 0000
0000 0000
0000 0000
0010 0000
uuuu uuuu
0000 0000
1000 0000
0000 0000
xxxx 0000
xxxx uuuu
xxxx 0000
b
b
b
b
b
b
b
b
b
b
b
9132A–AUTO–10/08
u=unchanged
x=unknown
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