ata6616 ATMEL Corporation, ata6616 Datasheet - Page 120
ata6616
Manufacturer Part Number
ata6616
Description
Microcontroller With Lin Transceiver, 5v Regulator And Watchdog
Manufacturer
ATMEL Corporation
Datasheet
1.ATA6616.pdf
(310 pages)
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4.11.8
120
ATA6616/ATA6617 [Preliminary]
Timer/Counter Timing Diagrams
OC0A Register at compare match between OCR0A and TCNT0 when the counter decrements.
The PWM frequency for the output when using phase correct PWM can be calculated by the fol-
lowing equation:
The N variable represents the prescale factor (1, 8, 32, 64, 128, 256, or 1024).
The extreme values for the OCR0A Register represent special cases when generating a PWM
waveform output in the phase correct PWM mode. If the OCR0A is set equal to BOTTOM, the
output will be continuously low and if set equal to MAX the output will be continuously high for
non-inverted PWM mode. For inverted PWM the output will have the opposite logic values.
The following figures show the Timer/Counter in synchronous mode, and the timer clock (clk
is therefore shown as a clock enable signal. In asynchronous mode, clk
the Timer/Counter Oscillator clock. The figures include information on when interrupt flags are
set.
count sequence close to the MAX value in all modes other than phase correct PWM mode.
Figure 4-37. Timer/Counter Timing Diagram, no Prescaling
Figure 4-38
Figure 4-38. Timer/Counter Timing Diagram, with Prescaler (f
f
OCnxPCPWM
Figure 4-37
TCNTn
TCNTn
(clk
(clk
TOVn
TOVn
clk
clk
clk
clk
I/O
I/O
I/O
I/O
Tn
Tn
/1)
/8)
=
shows the same timing data, but with the prescaler enabled.
-------------------- -
N
f
clk_I/O
contains timing data for basic Timer/Counter operation. The figure shows the
510
MAX - 1
MAX - 1
MAX
MAX
DRAFT
BOTTOM
BOTTOM
clk_I/O
/8)
I/O
should be replaced by
BOTTOM + 1
BOTTOM + 1
9132A–AUTO–10/08
T0
)
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