ata6616 ATMEL Corporation, ata6616 Datasheet - Page 90

• Manufacturer Part Number: ata6616
• Description: Microcontroller With Lin Transceiver, 5v Regulator And Watchdog
• Manufacturer: ATMEL Corporation

4.10
4.10.1
90
I/O-Ports
ATA6616/ATA6617 [Preliminary]
Introduction
All AVR ports have true Read-Modify-Write functionality when used as general digital I/O ports.
This means that the direction of one port pin can be changed without unintentionally changing
the direction of any other pin with the SBI and CBI instructions. The same applies when chang-
ing drive value (if configured as output) or enabling/disabling of pull-up resistors (if configured as
input). Each output buffer has symmetrical drive characteristics with both high sink and source
capability. The pin driver is strong enough to drive LED displays directly. All port pins have indi-
vidually selectable pull-up resistors with a supply-voltage invariant resistance. All I/O pins have
protection diodes to both Vcc and Ground as indicated in
“Electrical Characteristics” on page 267
Figure 4-24. I/O Pin Equivalent Schematic
All registers and bit references in this section are written in general form. A lower case “x” repre-
sents the numbering letter for the port, and a lower case “n” represents the bit number. However,
when using the register or bit defines in a program, the precise form must be used. For example,
PORTB3 for bit no. 3 in Port B, here documented generally as PORTxn. The physical I/O Regis-
ters and bit locations are listed in
Three I/O memory address locations are allocated for each port, one each for the Data Register
– PORTx, Data Direction Register – DDRx, and the Port Input Pins – PINx. The Port Input Pins
I/O location is read only, while the Data Register and the Data Direction Register are read/write.
However, writing a logic one to a bit in the PINx Register, will result in a toggle in the correspond-
ing bit in the Data Register. In addition, the Pull-up Disable – PUD bit in MCUCR or PUDx in
PORTCR disables the pull-up function for all pins in all ports when set.
Using the I/O port as General Digital I/O is described in
91. Most port pins are multiplexed with alternate functions for the peripheral features on the
device. How each alternate function interferes with the port pin is described in
Functions” on page
nate functions.
Note that enabling the alternate function of some of the port pins does not affect the use of the
other pins in the port as general digital I/O.
Pxn
96. Refer to the individual module sections for a full description of the alter-
“Register Description for I/O Ports” on page
C
pin
for a complete list of parameters.
DRAFT
"General Digital I/O" for
“Ports as General Digital I/O” on page
Figure
See Figure
R
Details
pu
4-24. Refer to
Logic
109.
“Alternate Port
9132A–AUTO–10/08
Section 4.23