atmega32c1 ATMEL Corporation, atmega32c1 Datasheet - Page 152
atmega32c1
Manufacturer Part Number
atmega32c1
Description
Atmega32m1 Automotive 8-bit Avr Microcontroller With 32k/64k Bytes In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.ATMEGA32C1.pdf
(366 pages)
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14.16.5
14.16.6
14.16.7
152
ATmega32/64/M1/C1
PSCOutput Compare SB Register – POCRnSBH and POCRnSBL
PSC Output Compare RB Register – POCR_RBH and POCR_RBL
PSC Configuration Register – PCNF
Note : n = 0 to 2 according to module number.
The Output Compare Registers RA, RB, SA and SB contain a 12-bit value that is continuously
compared with the PSC counter value. A match can be used to generate an Output Compare
interrupt, or to generate a waveform output on the associated pin.
The Output Compare Registers are 16bit and 12-bit in size. To ensure that both the high and low
bytes are written simultaneously when the CPU writes to these registers, the access is per-
formed using an 8-bit temporary high byte register (TEMP). This temporary register is shared by
all the other 16-bit registers.
• Bit 7:6 - not use
not use
• Bit 5 – PULOCK: PSC Update Lock
When this bit is set, the Output Compare Registers POCRnRA, POCRnSA, POCRnSB,
POCR_RB and the PSC Output Configuration Registers POC can be written without disturbing
the PSC cycles. The update of the PSC internal registers will be done if the PULOCK bit is
released to zero.
• Bit 4 – PMODE PSC Mode
Select the mode of PSC.
Table 14-10. PSC Mode Selection
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
PMODE
0
1
R/W
R/W
Description
One Ramp Mode (Edge Aligned)
Center Aligned Mode
7
–
0
7
–
0
7
R
0
-
R/W
R/W
6
–
0
6
–
0
R
6
0
-
PULOCK
R/W
R/W
R/W
5
–
0
5
–
0
5
0
PMODE
R/W
R/W
R/W
POCRnSB[7:0]
POCRnRB[7:0]
4
–
0
4
–
0
4
0
POPB
R/W
R/W
R/W
3
0
3
0
3
0
POPA
R/W
R/W
POCRnSB[11:8]
POCRnRB[11:8]
R/W
2
0
2
0
2
0
R/W
R/W
R
1
0
1
0
1
0
-
R/W
R/W
0
0
0
0
R
0
0
-
7647A–AVR–02/08
POCRnSBH
POCR_RBH
POCR_RBL
OCRnSBL
PCNF
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