atmega32c1 ATMEL Corporation, atmega32c1 Datasheet - Page 194

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atmega32c1

Manufacturer Part Number
atmega32c1
Description
Atmega32m1 Automotive 8-bit Avr Microcontroller With 32k/64k Bytes In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet

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16.11 MOb Registers
16.11.1
194
ATmega32/64/M1/C1
CAN MOb Status Register - CANSTMOB
• Bit 7:4 – MOBNB3:0: MOb Number
Selection of the MOb number, the available numbers are from 0 to 5.
Note:
• Bit 3 – AINC: Auto Increment of the FIFO CAN Data Buffer Index (Active Low)
• Bit 2:0 – INDX2:0: FIFO CAN Data Buffer Index
Byte location of the CAN data byte into the FIFO for the defined MOb.
The MOb registers has no initial (default) value after RESET.
• Bit 7 – DLCW: Data Length Code Warning
The incoming message does not have the DLC expected. Whatever the frame type, the DLC
field of the CANCDMOB register is updated by the received DLC.
• Bit 6 – TXOK: Transmit OK
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
The communication enabled by transmission is completed. TxOK rises at the end of EOF field.
When the controller is ready to send a frame, if two or more message objects are enabled as
producers, the lower MOb index (0 to 14) is supplied first.
• Bit 5 – RXOK: Receive OK
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
The communication enabled by reception is completed. RxOK rises at the end of the 6
EOF field. In case of two or more message object reception hits, the lower MOb index (0 to 14)
is updated first.
• Bit 4 – BERR: Bit Error (Only in Transmission)
This flag can generate an interrupt. It must be cleared using a read-modify-write software routine
on the whole CANSTMOB register.
The bit value monitored is different from the bit value sent.
Exceptions: the monitored recessive bit sent as a dominant bit during the arbitration field and the
acknowledge slot detecting a dominant bit during the sending of an error frame.
• Bit 3 – SERR: Stuff Error
Initial Value
Read/Write
Bit
– 0 - auto increment of the index (default value).
– 1- no auto increment of the index.
MOBNB3 always must be written to zero for compatibility with all AVR CAN devices.
DLCW
R/W
7
-
TXOK
R/W
6
-
RXOK
R/W
5
-
BERR
R/W
4
-
SERR
R/W
3
-
CERR
R/W
2
-
FERR
R/W
1
-
AERR
R/W
0
-
CANSTMOB
7647A–AVR–02/08
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