atmega32c1 ATMEL Corporation, atmega32c1 Datasheet - Page 264
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atmega32c1
Manufacturer Part Number
atmega32c1
Description
Atmega32m1 Automotive 8-bit Avr Microcontroller With 32k/64k Bytes In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.ATMEGA32C1.pdf
(366 pages)
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20.4.5
264
ATmega32/64/M1/C1
Analog Comparator Status Register – ACSR
These 3 bits determine the input of the negative input of the analog comparator.
The different setting are shown in
Table 20-8.
Bit
Read/Write
Initial Value
• Bit 7– AC3IF: Analog Comparator 3 Interrupt Flag Bit
This bit is set by hardware when comparator 3 output event triggers off the interrupt mode
defined by AC3IS1 and AC3IS0 bits in AC2CON register.
This bit is cleared by hardware when the corresponding interrupt vector is executed in case the
AC3IE in AC3CON register is set. Anyway, this bit is cleared by writing a logical one on it.
This bit can also be used to synchronize ADC or DAC conversions.
• Bit 6– AC2IF: Analog Comparator 2 Interrupt Flag Bit
This bit is set by hardware when comparator 2 output event triggers off the interrupt mode
defined by AC2IS1 and AC2IS0 bits in AC2CON register.
This bit is cleared by hardware when the corresponding interrupt vector is executed in case the
AC2IE in AC2CON register is set. Anyway, this bit is cleared by writing a logical one on it.
This bit can also be used to synchronize ADC or DAC conversions.
• Bit 5– AC1IF: Analog Comparator 1 Interrupt Flag Bit
This bit is set by hardware when comparator 1 output event triggers off the interrupt mode
defined by AC1IS1 and AC1IS0 bits in AC1CON register.
This bit is cleared by hardware when the corresponding interrupt vector is executed in case the
AC1IE in AC1CON register is set. Anyway, this bit is cleared by writing a logical one on it.
This bit can also be used to synchronize ADC or DAC conversions.
• Bit 4– AC0IF: Analog Comparator 0 Interrupt Flag Bit
This bit is set by hardware when comparator 0 output event triggers off the interrupt mode
defined by AC0IS1 and AC0IS0 bits in AC0CON register.
This bit is cleared by hardware when the corresponding interrupt vector is executed in case the
AC0IE in AC0CON register is set. Anyway, this bit is cleared by writing a logical one on it.
This bit can also be used to synchronize ADC or DAC conversions.
• Bit 3– AC3O: Analog Comparator 3 Output Bit
AC3M2
0
0
0
0
1
1
1
1
Analog Comparator 3 negative input selection
AC3M1
0
0
1
1
0
0
1
1
AC3IF
R/W
7
0
AC2IF
R/W
6
0
AC3M0
0
1
0
1
0
1
0
1
AC1IF
Table
R/W
5
0
20-6.
Description
“Vref”/6.40
“Vref”/3.20
“Vref”/2.13
“Vref”/1.60
Bandgap (1.1V)
DAC result
Analog Comparator Negative Input (ACMPM pin)
Reserved
AC0IF
R/W
4
0
AC3O
3
R
0
AC2O
R
2
0
AC1O
R
1
0
AC0O
R
0
0
7647A–AVR–02/08
ACSR
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