atmega32c1 ATMEL Corporation, atmega32c1 Datasheet - Page 253

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atmega32c1

Manufacturer Part Number
atmega32c1
Description
Atmega32m1 Automotive 8-bit Avr Microcontroller With 32k/64k Bytes In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet

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18.11.3
7647A–AVR–02/08
Amplifier 2 Control and Status register – AMP2CSR
Set this bit to connect the amplifier 1 to the comparator 1 positive input. In this configuration the
comparator clock is adapted to the amplifier clock and AMP1TS2,AMP1TS1, AMP1TS0 bits
have no effect.
Clear this bit to normally use the Amplifier 1.
• Bit 2:0 – AMP1TS2,AMP1TS1, AMP1TS0: Amplifier 1 Clock Source Selection Bits
In accordance with the Table 18-11, these 3 bits select the event which will generate the clock
for the amplifier 1. This clock source is necessary to start the conversion on the amplified
channel.
Table 18-11. AMP1 Clock Source Selection
Bit
Read/Write
Initial Value
• Bit 7 – AMP2EN: Amplifier 2 Enable Bit
Set this bit to enable the Amplifier 2.
Clear this bit to disable the Amplifier 2.
Clearing this bit while a conversion is running will take effect at the end of the conversion.
Warning: Always clear AMP2TS0:1 when clearing AMP2EN.
• Bit 6 – AMP2IS: Amplifier 2 Input Shunt
Set this bit to short-circuit the Amplifier 2 input.
Clear this bit to normally use the Amplifier 2.
• Bit 5, 4 – AMP2G1, 0: Amplifier 2 Gain Selection Bits
These 2 bits determine the gain of the amplifier 2.
The different setting are shown in
Table 18-12. Amplifier 2 Gain Selection
AMP1TS2
0
0
0
0
1
1
1
1
AMP2G1
0
AMP1TS1
0
0
1
1
0
0
1
1
AMP2G0
0
AMP2EN
R/W
7
0
AMP2IS
R/W
AMP1TS0
0
1
0
1
0
1
0
1
6
0
Description
Gain 5
AMP2G1
Table
R/W
5
0
Clock Source
ADC Clock/8
Timer/Counter0 Compare Match
Timer/Counter0 Overflow
Timer/Counter1 Compare Match B
Timer/Counter1 Overflow
PSC Module 0 Synchronization Signal (PSS0)
PSC Module 1 Synchronization Signal (PSS1)
PSC Module 2 Synchronization Signal (PSS2)
18-12.
AMP2G0
R/W
4
0
AMPCMP2
R/W
3
0
ATmega32/64/M1/C1
AMP2TS2
R/W
2
0
AMP2TS1
R/W
1
0
AMP2TS0
R/W
0
0
AMP2CSR
253

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