SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 180

• Manufacturer Part Number: SAF-C164SM
• Description: 16-Bit CMOS Microcontroller
• Manufacturer: Infineon Technologies

C164CM/C164SM
Derivatives
External Bus Interface
Programmable Memory Cycle Time
The C164CM allows the user to adjust the controller’s external bus cycles to the access
time of the respective memory or peripheral. This access time is the total time required
to move the data to the destination. It represents the period of time during which the
controller’s signals do not change.
Bus Cycle
ALE
BUS (P0)
Data/Instr.
Address
RD
BUS (P0)
Address
Data
WR
MCTC Wait States (1...15)
MCT02063M
Figure 9-7
Memory Cycle Time
The external bus cycles of the C164CM can be extended for a memory or peripheral
which cannot keep pace with the controller’s maximum speed. This is accomplished by
introducing wait states during the access (see
Figure
9-7). During these memory cycle
time wait states, the CPU is idle if this access is required for the execution of the current
instruction.
The memory cycle time wait states can be programmed in increments of one CPU clock
(2 TCL) within a range from 0 to 15 (default after reset) via the MCTC fields of the
BUSCON registers. 15 - <MCTC> waitstates will be inserted.
User’s Manual
9-11
V1.0, 2002-02