SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 67

• Manufacturer Part Number: SAF-C164SM
• Description: 16-Bit CMOS Microcontroller
• Manufacturer: Infineon Technologies

4.3
The C164CM provides several mechanisms for bit manipulation. These mechanisms
either manipulate software flags within the internal RAM, control on-chip peripherals via
control bits in their respective SFRs, or control IO functions via port pins.
The instructions BSET, BCLR, BAND, BOR, BXOR, BMOV, BMOVN explicitly set or
clear specific bits. The instructions BFLDL and BFLDH allow manipulation of up to 8 bits
of a specific byte at one time. The instructions JBC and JNBS implicitly clear or set the
specified bit when the jump is taken. The instructions JB and JNB (also conditional jump
instructions that refer to flags) evaluate the specified bit to determine if the jump is to be
taken.
Note: Bit operations on undefined bit locations will always read a bit value of ‘0’, while
All instructions that manipulate single bits or bit groups internally use a read-modify-write
sequence that accesses the whole word containing the specified bit(s).
This method has several consequences:
• Bits can be modified only within the internal address areas (internal RAM and SFRs).
The upper 256 bytes of the SFR area, the ESFR area, and the internal RAM are
bit-addressable (see
sections can be manipulated directly using bit instructions. The other SFRs must be
accessed byte/word wise.
Note: All GPRs are bit-addressable independently from the allocation of the register
• The read-modify-write approach may be critical with hardware-affected bits. In these
Protected bits are not changed during the read-modify-write sequence, such as when
hardware sets an interrupt request flag between the read and the write of the
read-modify-write sequence. The hardware protection logic guarantees that only the
intended bit(s) is/are affected by the write-back operation.
Note: If a conflict occurs between a bit manipulation generated by hardware and an
A summary of the protected bits implemented in the C164CM can be found at the end of
Chapter
User’s Manual
External locations cannot be used with bit instructions.
cases, the hardware may change specific bits while the read-modify-write operation is
in progress; thus, the writeback would overwrite the new bit value generated by the
hardware. The solution is provided by either the implemented hardware protection
(see below) or through special programming (see
the write access will not affect the respective bit location.
bank via the Context Pointer (CP). Even GPRs which are allocated to
non-bit-addressable RAM locations provide this feature.
intended software access, the software access has priority and determines the
final value of the respective bit.
2.
Bit-Handling and Bit-Protection
Chapter
3); so, the register bits located within those respective
4-10
Section
Central Processing Unit (CPU)
4.2).
C164CM/C164SM
Derivatives
V1.0, 2002-02