SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 201

• Manufacturer Part Number: SAF-C164SM
• Description: 16-Bit CMOS Microcontroller
• Manufacturer: Infineon Technologies

Timer 3 in Gated Timer Mode
Gated timer mode for the core timer T3 is selected by setting bit field T3M in register
T3CON to ‘010
input. The same options for the input frequency are available in gated timer mode as in
timer mode. However, the input clock to the timer in this mode is gated by the external
input pin T3IN (Timer T3 External Input).
To enable this operation, pin T3IN must be configured as input, that is, the corresponding
direction control bit must contain ‘0’.
Figure 10-4 Block Diagram of Core Timer T3 in Gated Timer Mode
If T3M.0 = ‘0’, the timer is enabled when T3IN shows a low level. A high level at this pin
stops the timer. If T3M.0 = ‘1’, pin T3IN must have a high level in order to enable the
timer. Additionally, the timer can be turned on or off by software using bit T3R. The timer
will only run, if T3R = ‘1’ and the gate is active. It will stop if either T3R = ‘0’ or the gate
is inactive.
Note: A transition of the gate signal at pin T3IN does not cause an interrupt request.
User’s Manual
T3IN = P5.3
T3EUD = P5.2
TxIN
TxEUD
f
CPU
2
B
TxI
n
’ or ‘011
: 1
TxUD
MUX
XOR
TxM
B
’. Bit T3M.0 (T3CON.3) selects the active level of the gate
TxUDE
0
1
MUX
TxR
Core Timer Tx
10-7
Up/
Down
General Purpose Timer Unit
TxOTL
C164CM/C164SM
To auxiliary
Timers
Interrupt
Request
(TxIR)
Derivatives
V1.0, 2002-02
MCB02029b
n = 3 … 10
x = 3