SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 369

• Manufacturer Part Number: SAF-C164SM
• Description: 16-Bit CMOS Microcontroller
• Manufacturer: Infineon Technologies

C164CM/C164SM
Derivatives
On-Chip CAN Interface
Module Initialization
Module initialization is enabled by setting bit INIT in the control register CSR. This can
be done by the CPU via software, or by the CAN controller automatically on a hardware
reset, or if the EML switches to busoff state.
While INIT is set:
• All message transfer from and to the CAN bus is stopped
• The CAN transmit line CAN_TXD is “1” (recessive)
• Control bits NEWDAT and RMTPND of the last message object are reset
• Counters of the EML are left unchanged.
Additionally, setting bit CCE permits configuration changes in the Bit Timing Register.
To initialize the CAN Controller, the following actions are required:
• Configure the Bit Timing Register (CCE required)
• Set the Global Mask Registers
• Initialize each message object.
If a message object is not needed, it is sufficient to clear its message valid bit (MSGVAL),
that is, to define it as not valid. Otherwise, the entire message object must be initialized.
After the initialization sequence has been completed, the CPU clears bit INIT.
Now, the BSP synchronizes itself to the data transfer on the CAN bus by waiting for the
occurrence of a sequence of 11 consecutive recessive bits (i.e. Bus Idle) before it can
take part in bus activities and start message transfers.
Initialization of the message objects is independent of the state of bit INIT and can be
done on the fly. The message objects should all be configured to particular identifiers or
set to “not valid” before the BSP starts the message transfer, however.
To change the configuration of a message object during normal operation, the CPU first
clears bit MSGVAL, which defines it as not valid. When the configuration is completed,
MSGVAL is set again.
User’s Manual
19-32
V1.0, 2002-02