SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 46

• Manufacturer Part Number: SAF-C164SM
• Description: 16-Bit CMOS Microcontroller
• Manufacturer: Infineon Technologies

Special Function Registers
The functions of the CPU, the bus interface, the IO ports, and the on-chip peripherals of
the C164CM are controlled via a number of Special Function Registers (SFRs). These
SFRs are arranged within two areas of 512 Bytes each. The first register block, the SFR
area, is located in the 512 Bytes above the Internal RAM (00’FFFF
second register block, the Extended SFR (ESFR) area, is located in the 512 Bytes below
the Internal RAM (00’F1FF
Special Function Registers can be addressed via indirect and long 16-bit addressing
modes. Using an 8-bit offset together with an implicit base address allows word SFRs
and their respective low bytes to be addressed. However, this does not work for the
respective high bytes!
Note: Writing to any byte of an SFR causes the non-addressed complementary byte to
The upper half of each register block is bit-addressable, so the respective control/status
bits can be modified directly or checked using bit addressing.
When accessing registers in the ESFR area using 8-bit addresses or direct bit
addressing, an Extend Register (EXTR) instruction is required beforehand to switch the
short addressing mechanism from the standard SFR area to the Extended SFR area.
This is not required for 16-bit and indirect addresses. The GPRs R15 … R0 are
duplicated, i.e. they are accessible within both register blocks via short 2-, 4- or 8-bit
addresses without switching.
ESFR_SWITCH_EXAMPLE:
EXTR
MOV
BFLDL
BSET
MOV
;----
MOV
In order to minimize the use of the EXTR instructions the ESFR area primarily holds
registers which are mainly required for initialization and mode selection. Registers which
need to be accessed frequently are allocated to the standard SFR area wherever
possible.
Note: The tools are equipped to monitor accesses to the ESFR area and will
User’s Manual
be cleared!
automatically insert EXTR instructions, or issue a warning in case of missing or
excessive EXTR instructions.
#4
ODP8, #data16
DP8, #mask, #data8 ;Bit addressing for bit fields
DP1H.7
T8REL, R1
;----------------- ;The scope of the EXTR #4 instruction …
T8REL, R1
H
… 00’F000
;Switch to ESFR area for next 4 instr.
;ODP2 uses 8-bit reg addressing
;Bit addressing for single bits
;T8REL uses 16-bit mem address,
;R1 is duplicated into the ESFR space
;(EXTR is not required for this access)
;… ends here!
;T8REL uses 16-bit mem address,
;R1 is accessed via the SFR space
H
).
3-8
Memory Organization
H
C164CM/C164SM
… 00’FE00
Derivatives
V1.0, 2002-02
H
). The