SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 274

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SAF-C164SM

Manufacturer Part Number
SAF-C164SM
Description
16-Bit CMOS Microcontroller
Manufacturer
Infineon Technologies
Datasheet
Counter Mode
The bits TxM in SFR T78CON select between timer mode or counter mode for the
respective timer. In Counter mode (TxM = ‘1’) the input clock for a timer can be derived
from the overflows/underflows of timer T3 in block GPT1. Additionally, timer T7 can be
clocked by external events. Either a positive, a negative, or both a positive and a
negative transition at pin T7IN (alternate port input function) can be selected to cause an
increment of T7.
When T8 is programmed to run in counter mode, bit field TxI is used to enable the
overflows/underflows of timer T3 as the count source. This is the only option for T8 and
it is selected by the combination TxI = 000
other valid combination, the respective timer will stop.
When T7 is programmed to run in counter mode, bit field TxI is used to select the count
source and transition (if the source is the input pin) which should cause a count trigger
(see description of T78CON for the possible selections).
Note: To use pin T7IN as external count input pin, the respective port pin must be
The maximum external input frequency to T7 in counter mode is
a signal transition is properly recognized at the timer input, an external count input signal
should be held for at least eight CPU clock cycles before it changes its level again. The
incremented count value appears in SFR T7 within eight CPU clock cycles after the
signal transition at pin T7IN.
Reload
In both modes, a reload of a timer with the 16-bit value stored in its associated reload
register is performed each time a timer would overflow from FFFF
case, the timer does not wrap around to 0000
of the respective reload register TxREL. The timer then resumes incrementing starting
from the reloaded value.
The reload registers TxREL are not bit-addressable.
User’s Manual
configured as input: the corresponding direction control bit must be cleared
(DPx.y = ‘0’).
If the respective port pin is configured as output, the associated timer may be
clocked by modifying the port output latches Px.y via software, such as for testing
purposes.
16-8
B
. When bit field TxI is programmed to any
H
, but rather is reloaded with the contents
Capture/Compare Unit CAPCOM2
f
CPU
H
C164CM/C164SM
to 0000
/16. To ensure that
Derivatives
V1.0, 2002-02
H
. In such a

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