SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 35

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SAF-C164SM

Manufacturer Part Number
SAF-C164SM
Description
16-Bit CMOS Microcontroller
Manufacturer
Infineon Technologies
Datasheet
C164CM/C164SM
Derivatives
Architectural Overview
Capture/Compare (CAPCOM) Units
The CAPCOM units are typically used to handle high speed I/O tasks such as pulse and
waveform generation, pulse width modulation (PWM), Digital to Analog (D/A)
conversion, software timing, or time recording relative to external events.
A number of dedicated timers with reload registers provide independent time bases for
the capture/compare channels. The input clock for the timers is programmable to several
prescaled values of the internal CPU clock, or may be derived from an overflow/
underflow of timer T3 in module GPT1 (for CAPCOM2 timers). This provides a wide
range of variation for the timer period and resolution and allows precise adjustments to
the application specific requirements. In addition, external inputs for the CAPCOM units
allow event scheduling for the capture/compare registers relative to external events.
The CAPCOM2 unit supports generation and control of timing sequences on up to
16 channels (12 I/O pins) with a maximum resolution of 8 CPU clock cycles. The
capture/compare register array contains 16 dual purpose capture/compare registers,
each of which may be individually allocated to either CAPCOM2 timer T7 or T8, and
programmed for capture or compare function. Twelve registers have port pins
associated with them: they serve as input pins for triggering the capture function, or as
output pins to indicate the occurrence of a compare event.
When a capture/compare register has been selected for capture mode, the current
contents of the allocated timer will be latched (captured) into the capture/compare
register in response to an external event at the port pin which is associated with this
register. In addition, a specific interrupt request for this capture/compare register is
generated. Either a positive, a negative, or both a positive and a negative external signal
transition at the pin can be selected as the triggering event. The contents of all registers
which have been selected for one of the five compare modes are continuously compared
with the contents of the allocated timers. When a match occurs between the timer value
and the value in a capture/compare register, specific actions will be taken based on the
selected compare mode.
The CAPCOM6 unit provides three capture/compare channels and one additional
compare channel. The three capture/compare channels can control two output lines
each, which can be programmed to generate non-overlapping pulse patterns. The
additional compare channel may either generate a separate output signal or modulate
the output signals of the three other channels. The active level for each output can be
selected individually.
Versatile multichannel PWM signals can be generated: controlled either internally via a
timer or externally, for example via hall sensors. The trap function allows the outputs to
be driven to a defined level in response to an external signal.
Note: Multichannel PWM modes are only available in devices with a full-function
CAPCOM6, not in the reduced CAPCOM6.
User’s Manual
2-18
V1.0, 2002-02

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