SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 240

• Manufacturer Part Number: SAF-C164SM
• Description: 16-Bit CMOS Microcontroller
• Manufacturer: Infineon Technologies

C164CM/C164SM
Derivatives
High-Speed Synchronous Serial Interface
Initialization of the SCLK pin on the master requires some attention to avoid undesired
clock transitions which could disturb the other receivers. The state of the internal
alternate output lines is ‘1’ as long as the SSC is disabled. This alternate output signal is
ANDed with the respective port line output latch. Enabling the SSC with an idle-low clock
(SSCPO = ‘0’) will drive the alternate data output and (via the AND) the port pin SCLK
immediately low. To avoid this, use the following sequence:
• Select the clock idle level (SSCPO = ‘x’)
• Load the port output latch with the desired clock idle level (P0H.7 = ‘x’)
• Switch the pin to output (DP0H.7 = ‘1’)
• Enable the SSC (SSCEN = ‘1’)
• If SSCPO = ‘0’: enable alternate data output (P0H.7 = ‘1’)
The same mechanism for selecting a slave for transmission (separate select lines or
special commands) may also be used to move the role of the master to another device
in the network. In this case, the previous master and the future master (previous slave)
will need to toggle their operating modes (SSCMS) and the direction of their port pins
(see description above).
User’s Manual
12-9
V1.0, 2002-02