SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 64

• Manufacturer Part Number: SAF-C164SM
• Description: 16-Bit CMOS Microcontroller
• Manufacturer: Infineon Technologies

Explicit Stack Pointer Updating
None of the RET, RETI, RETS, RETP or POP instructions is capable of correctly using
a new SP register value which has been updated by an immediately preceding
instruction. Thus, in order to use the new SP register value without erroneously
performed stack accesses, at least one instruction must be inserted between an
explicitly SP-writing and any subsequent use of the just mentioned implicitly SP-using
instructions, as shown in the following example:
I
I
I
Note: Conflicts with instructions writing to the stack (PUSH, CALL, SCXT) are solved
Controlling Interrupts
Software modifications (implicit or explicit) of the PSW are made in the execute phase of
the respective instructions. To maintain fast interrupt responses, however, the current
interrupt prioritization round does not consider these changes; that means that an
interrupt request may be acknowledged after the instruction which disables interrupts via
IEN or ILVL or after the following instructions. Time critical instruction sequences
therefore should not begin directly after the instruction disabling interrupts, as shown in
the following examples:
INTERRUPTS_OFF:
BCLR
<Instr non-crit>
<Instr 1st-crit>
. . .
<Instr last-crit>
INTERRUPTS_ON:
BSET
CRITICAL_SEQUENCE:
ATOMIC #3
BCLR
. . .
BSET
Note: The described delay of one instruction also applies for enabling the interrupts
User’s Manual
n
n+1
n+2
internally by the CPU logic.
system i.e. no interrupt requests are acknowledged until the instruction following
the enabling instruction.
IEN
IEN
IEN
IEN
:MOV
:…
:POP
SP,#0FA40H
R0
;select a new top of stack
;must not be an instruction popping
;operands from the system stack
;pop word value from new top of stack
;into R0
;globally disable interrupts
;non-critical instruction
;begin of
;uninterruptable critical sequence
;end of critical sequence
;globally re-enable interrupts
;immediately block interrupts
;globally disable interrupts
;here is the uninterruptable sequence
;globally re-enable interrupts
4-7
Central Processing Unit (CPU)
C164CM/C164SM
Derivatives
V1.0, 2002-02