S912XEP768J5MAGR Freescale Semiconductor, S912XEP768J5MAGR Datasheet - Page 1077

• Manufacturer Part Number: S912XEP768J5MAGR
• Description: 16-bit Microcontrollers - MCU 16-bit 768K Flash
• Manufacturer: Freescale Semiconductor

Specifications of S912XEP768J5MAGR

• Rohs: yes
• Core: HCS12X
• Processor Series: MC9S12
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 768 KB
• Data Ram Size: 48 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.3 V to 5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-144
• Mounting Style: SMD/SMT

Chapter 28
768 KByte Flash Module (S12XFTM768K4V2)
28.1
The FTM768K4 module implements the following:
Freescale Semiconductor
Revision
Number
V02.09
V02.10
V02.11
•
768 Kbytes of P-Flash (Program Flash) memory, consisting of 4 physical Flash blocks, intended
primarily for nonvolatile code storage
Introduction
29 Nov 2007
19 Dec 2007
25 Sep 2009
Revision
Date
28.4.2/28-1113
28.4.2/28-1113
28.3.1/28-1082
28.3.2/28-1087
28.1/28-1077
28.4.2.12/28-
28.4.2.12/28-
28.4.2.12/28-
28.4.2.20/28-
28.6/28-1138
28.3.2.1/28-
28.4.2.4/28-
28.4.2.7/28-
28.3.2.1/28-
28.4.1.2/28-
Sections
Affected
1089
1116
1119
1123
1123
1123
1132
1089
1108
MC9S12XE-Family Reference Manual Rev. 1.25
Table 28-1. Revision History
- Cleanup
- Updated Command Error Handling tables based on parent-child relationship
with FTM1024K5
- Corrected Error Handling table for Full Partition D-Flash, Partition D-Flash,
and EEPROM Emulation Query commands
- Corrected P-Flash Memory Addressing table
- Clarify single bit fault correction for P-Flash phrase
- Expand FDIV vs OSCCLK Frequency table
- Add statement concerning code runaway when executing Read Once
command from Flash block containing associated fields
- Add statement concerning code runaway when executing Program Once
command from Flash block containing associated fields
- Add statement concerning code runaway when executing Verify Backdoor
Access Key command from Flash block containing associated fields
- Relate Key 0 to associated Backdoor Comparison Key address
- Change “power down reset” to “reset”
- Add ACCERR condition for Disable EEPROM Emulation command
The following changes were made to clarify module behavior related to Flash
register access during reset sequence and while Flash commands are active:
- Add caution concerning register writes while command is active
- Writes to FCLKDIV are allowed during reset sequence while CCIF is clear
- Add caution concerning register writes while command is active
- Writes to FCCOBIX, FCCOBHI, FCCOBLO registers are ignored during
reset sequence
Description of Changes
1077