S912XEP768J5MAGR Freescale Semiconductor, S912XEP768J5MAGR Datasheet - Page 128

• Manufacturer Part Number: S912XEP768J5MAGR
• Description: 16-bit Microcontrollers - MCU 16-bit 768K Flash
• Manufacturer: Freescale Semiconductor

Specifications of S912XEP768J5MAGR

• Rohs: yes
• Core: HCS12X
• Processor Series: MC9S12
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 768 KB
• Data Ram Size: 48 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.3 V to 5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-144
• Mounting Style: SMD/SMT

1. Read: Anytime.
1. Read: Anytime.
Chapter 2 Port Integration Module (S12XEPIMV1)
2.3.33
2.3.34
128
Address 0x024C
Address 0x024D
Write: Anytime.
Write: Anytime.
PERS
PPSS
Field
Field
Reset
Reset
7-0
7-0
W
W
R
R
Port S pull device enable—Enable pull devices on input pins
These bits configure whether a pull device is activated, if the associated pin is used as an input. This bit has no effect
if the pin is used as an output. Out of reset all pull devices are enabled.
1 Pull device enabled.
0 Pull device disabled.
Port S pull device select—Determine pull device polarity on input pins
This register selects whether a pull-down or a pull-up device is connected to the pin.
1 A pull-down device is connected to the associated pin, if enabled and if the pin is used as input.
0 A pull-up device is connected to the associated pin, if enabled and if the pin is used as input.
PERS7
PPSS7
Port S Pull Device Enable Register (PERS)
Port S Polarity Select Register (PPSS)
1
0
7
7
PERS6
PPSS6
Figure 2-31. Port S Pull Device Enable Register (PERS)
1
0
6
6
Figure 2-32. Port S Polarity Select Register (PPSS)
Table 2-30. PERS Register Field Descriptions
Table 2-31. PPSS Register Field Descriptions
MC9S12XE-Family Reference Manual Rev. 1.25
PERS5
PPSS5
1
0
5
5
PERS4
PPSS4
1
0
4
4
Description
Description
PERS3
PPSS3
3
1
3
0
PERS2
PPSS2
1
0
2
2
Access: User read/write
Access: User read/write
Freescale Semiconductor
PERS1
PPSS1
1
0
1
1
PERS0
PPSS0
1
0
0
0
(1)
(1)