S912XEP768J5MAGR Freescale Semiconductor, S912XEP768J5MAGR Datasheet - Page 330

• Manufacturer Part Number: S912XEP768J5MAGR
• Description: 16-bit Microcontrollers - MCU 16-bit 768K Flash
• Manufacturer: Freescale Semiconductor

Specifications of S912XEP768J5MAGR

• Rohs: yes
• Core: HCS12X
• Processor Series: MC9S12
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 768 KB
• Data Ram Size: 48 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.3 V to 5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-144
• Mounting Style: SMD/SMT

Chapter 8 S12X Debug (S12XDBGV3) Module
8.4.2.4
When using the AB comparator pair for a range comparison, the data bus can also be used for qualification
by using the comparator A data and data mask registers. Furthermore the DBGACTL RW and RWE bits
can be used to qualify the range comparison on either a read or a write access. The corresponding
DBGBCTL bits are ignored. Similarly when using the CD comparator pair for a range comparison, the
data bus can also be used for qualification by using the comparator C data and data mask registers.
Furthermore the DBGCCTL RW and RWE bits can be used to qualify the range comparison on either a
read or a write access if tagging is not selected. The corresponding DBGDCTL bits are ignored. The SZE
and SZ control bits are ignored in range mode. The comparator A and C TAG bits are used to tag range
comparisons for the AB and CD ranges respectively. The comparator B and D TAG bits are ignored in
range modes. In order for a range comparison using comparators A and B, both COMPEA and COMPEB
must be set; to disable range comparisons both must be cleared. Similarly for a range CD comparison, both
COMPEC and COMPED must be set. If a range mode is selected SRCA and SRCC select the source
(S12X or XGATE), SRCB and SRCD are ignored. The comparator A and C BRK bits are used for the AB
and CD ranges respectively, the comparator B and D BRK bits are ignored in range mode. When
configured for range comparisons and tagging, the ranges are accurate only to word boundaries.
8.4.2.4.1
In the Inside Range comparator mode, either comparator pair A and B or comparator pair C and D can be
configured for range comparisons by the control register (DBGC2). The match condition requires that a
valid match for both comparators happens on the same bus cycle. A match condition on only one
comparator is not valid. An aligned word access which straddles the range boundary will cause a trigger
only if the aligned address is inside the range.
8.4.2.4.2
In the Outside Range comparator mode, either comparator pair A and B or comparator pair C and D can
be configured for range comparisons. A single match condition on either of the comparators is recognized
as valid. An aligned word access which straddles the range boundary will cause a trigger only if the aligned
address is outside the range.
Outside range mode in combination with tagged triggers can be used to detect if the opcode fetches are
from an unexpected range. In forced trigger modes the outside range trigger would typically be activated
at any interrupt vector fetch or register access. This can be avoided by setting the upper or lower range limit
to $7FFFFF or $000000 respectively. Interrupt vector fetches do not cause taghits
330
NDB
Range Comparisons
0
0
1
1
Inside Range (CompAC_Addr ≤ address ≤ CompBD_Addr)
Outside Range (address < CompAC_Addr or address > CompBD_Addr)
DBGxDHM[n] /
DBGxDLM[n]
0
1
0
1
Table 8-41. NDB and MASK bit dependency
MC9S12XE-Family Reference Manual Rev. 1.25
Compare data bus bit. Match on equivalence.
Compare data bus bit. Match on difference.
Do not compare data bus bit.
Do not compare data bus bit.
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