S912XEP768J5MAGR Freescale Semiconductor, S912XEP768J5MAGR Datasheet - Page 200

• Manufacturer Part Number: S912XEP768J5MAGR
• Description: 16-bit Microcontrollers - MCU 16-bit 768K Flash
• Manufacturer: Freescale Semiconductor

Specifications of S912XEP768J5MAGR

• Rohs: yes
• Core: HCS12X
• Processor Series: MC9S12
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 768 KB
• Data Ram Size: 48 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.3 V to 5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-144
• Mounting Style: SMD/SMT

Chapter 3 Memory Mapping Control (S12XMMCV4)
EROMON and ROMON control the visibility of the Flash in the memory map for CPU or BDM (not for
XGATE). Both local and global memory maps are affected.
200
EROMON
ROMHM
ROMON
Field
2
1
0
1. Internal Flash means Flash resources inside the MCU are read/written.
2. The external access stretch mechanism is part of the EBI module (refer to EBI Block Guide for details).
Emulation memory means resources inside the emulator are read/written (PRU registers, flash
replacement, RAM, EEPROM and register space are always considered internal).
External application means resources residing outside the MCU are read/written.
Emulation Single Chip
Emulation Expanded
Enables emulated Flash or ROM memory in the memory map
Write: Never
This bit is used in some modes to define the placement of the Emulated Flash or ROM (Refer to
0 Disables the emulated Flash or ROM in the memory map.
1 Enables the emulated Flash or ROM in the memory map.
FLASH or ROM only in higher Half of Memory Map
Write: Once in normal and emulation modes and anytime in special modes
0 The fixed page of Flash or ROM can be accessed in the lower half of the memory map. Accesses to
1 Disables access to the Flash or ROM in the lower half of the memory map.These physical locations of the
Enable FLASH or ROM in the memory map
Write: Once in normal and emulation modes and anytime in special modes.
This bit is used in some modes to define the placement of the ROM (Refer to
0 Disables the Flash or ROM from the memory map.
1 Enables the Flash or ROM in the memory map.
Normal Single Chip
Special Single Chip
Normal Expanded
0x4000–0x7FFF will be mapped to 0x7F_4000-0x7F_7FFF in the global memory space.
Flash or ROM can still be accessed through the program page window. Accesses to 0x4000–0x7FFF will be
mapped to 0x14_4000-0x14_7FFF in the global memory space (external access).
Chip Modes
Special Test
Table 3-12. Data Sources when CPU or BDM is Accessing Flash Area
Table 3-11. MMCCTL1 Field Descriptions (continued)
MC9S12XE-Family Reference Manual Rev. 1.25
ROMON
X
X
X
0
1
0
1
1
0
1
EROMON
X
X
X
X
X
X
0
1
0
1
Description
External Application
External Application
External Application
Emulation Memory
Emulation Memory
DATA SOURCE
Internal Flash
Internal Flash
Internal Flash
Internal Flash
Internal Flash
Table
(1)
3-12)
Freescale Semiconductor
Stretch
N
N
Y
N
Y
N
N
Table
(2)
3-12)