S912XEP768J5MAGR Freescale Semiconductor, S912XEP768J5MAGR Datasheet - Page 167
S912XEP768J5MAGR
Manufacturer Part Number
S912XEP768J5MAGR
Description
16-bit Microcontrollers - MCU 16-bit 768K Flash
Manufacturer
Freescale Semiconductor
Datasheet
1.S912XEG128J2MAL.pdf
(1324 pages)
Specifications of S912XEP768J5MAGR
Rohs
yes
Core
HCS12X
Processor Series
MC9S12
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
768 KB
Data Ram Size
48 KB
On-chip Adc
Yes
Operating Supply Voltage
3.3 V to 5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-144
Mounting Style
SMD/SMT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S912XEP768J5MAGR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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1. Read: Always reads 0x00
1. Read: Anytime.
2.3.91
2.3.92
Freescale Semiconductor
Address 0x036E
Address 0x036F
PTRRR
PTRRR
Write: Unimplemented
Write: Anytime.
PPSR
Field
Field
Reset
Reset
7-0
7
6
W
W
R
R
Port R pull device select—Determine pull device polarity on input pins
This register selects whether a pull-down or a pull-up device is connected to the pin.
1 A pull-down device is connected to the associated pin, if enabled and if the pin is used as input.
0 A pull-up device is connected to the associated pin, if enabled and if the pin is used as input.
PTRRR7
Port R routing—
This register configures the re-routing of the associated TIM channel.
1 TIMIOC7 is available on PP7
0 TIMIOC7 is available on PR7
Port R routing—
This register configures the re-routing of the associated TIM channel.
1 TIMIOC6 is available on PP6
0 TIMIOC6 is available on PR6
PIM Reserved Register
Port R Routing Register (PTRRR)
0
0
0
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
PTRRR6
0
0
0
6
6
Table 2-87. PTR Routing Register Field Descriptions
Figure 2-90. Port R Routing Register (PTRRR)
Table 2-86. PPSR Register Field Descriptions
MC9S12XE-Family Reference Manual Rev. 1.25
PTRRR5
Figure 2-89. PIM Reserved Register
0
0
0
5
5
PTRRR4
0
0
0
4
4
Description
Description
PTRRR3
3
0
0
3
0
Chapter 2 Port Integration Module (S12XEPIMV1)
PTRRR2
0
0
0
2
2
Access: User read/write
PTRRR1
0
0
0
1
1
Access: User read
PTRRR0
0
0
0
0
0
167
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(1)
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