S912XEP768J5MAGR Freescale Semiconductor, S912XEP768J5MAGR Datasheet - Page 307

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S912XEP768J5MAGR

Manufacturer Part Number
S912XEP768J5MAGR
Description
16-bit Microcontrollers - MCU 16-bit 768K Flash
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XEP768J5MAGR

Rohs
yes
Core
HCS12X
Processor Series
MC9S12
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
768 KB
Data Ram Size
48 KB
On-chip Adc
Yes
Operating Supply Voltage
3.3 V to 5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-144
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S912XEP768J5MAGR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
8.1.4
The S12XDBG module can be used in all MCU functional modes.
During BDM hardware accesses and whilst the BDM module is active, CPU12X monitoring is disabled.
Thus breakpoints, comparators, and CPU12X bus tracing are disabled but XGATE bus monitoring
accessing the S12XDBG registers, including comparator registers, is still possible. While in active BDM
or during hardware BDM accesses, XGATE activity can still be compared, traced and can be used to
generate a breakpoint to the XGATE module. When the CPU12X enters active BDM Mode through a
BACKGROUND command, with the S12XDBG module armed, the S12XDBG remains armed.
The S12XDBG module tracing is disabled if the MCU is secure. However, breakpoints can still be
generated if the MCU is secure.
Freescale Semiconductor
Enable
BDM
x
0
0
1
1
XGATE S/W breakpoint request trigger independent of comparators
TRIG Immediate software trigger independent of comparators
Four trace modes
— Normal: change of flow (COF) PC information is stored (see
— Loop1: same as Normal but inhibits consecutive duplicate source address entries
— Detail: address and data for all cycles except free cycles and opcode fetches are stored
— Pure PC: All program counter addresses are stored.
4-stage state sequencer for trace buffer control
— Tracing session trigger linked to Final State of state sequencer
— Begin, End, and Mid alignment of tracing to trigger
flow definition.
Modes of Operation
Active
BDM
x
0
1
0
1
Secure
MCU
1
0
0
0
0
Table 8-3. Mode Dependent Restriction Summary
MC9S12XE-Family Reference Manual Rev. 1.25
Matches Enabled
Comparator
XGATE only
Yes
Yes
Yes
Active BDM not possible when not enabled
Breakpoints
XGATE only
Only SWI
Possible
Yes
Yes
Chapter 8 S12X Debug (S12XDBGV3) Module
Section
XGATE only
Possible
Tagging
Yes
Yes
Yes
8.4.5.2.1) for change of
XGATE only
Possible
Tracing
Yes
Yes
No
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