S912XEP768J5MAGR Freescale Semiconductor, S912XEP768J5MAGR Datasheet - Page 348
S912XEP768J5MAGR
Manufacturer Part Number
S912XEP768J5MAGR
Description
16-bit Microcontrollers - MCU 16-bit 768K Flash
Manufacturer
Freescale Semiconductor
Datasheet
1.S912XEG128J2MAL.pdf
(1324 pages)
Specifications of S912XEP768J5MAGR
Rohs
yes
Core
HCS12X
Processor Series
MC9S12
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
768 KB
Data Ram Size
48 KB
On-chip Adc
Yes
Operating Supply Voltage
3.3 V to 5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-144
Mounting Style
SMD/SMT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S912XEP768J5MAGR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Chapter 9 Security (S12XE9SECV2)
9.1.2
Table 9-2
9.1.3
Once the user has programmed the Flash and EEPROM, the chip can be secured by programming the
security bits located in the options/security byte in the Flash memory array. These non-volatile bits will
keep the device secured through reset and power-down.
The options/security byte is located at address 0xFF0F (= global address 0x7F_FF0F) in the Flash memory
array. This byte can be erased and programmed like any other Flash location. Two bits of this byte are used
for security (SEC[1:0]). On devices which have a memory page window, the Flash options/security byte
is also available at address 0xBF0F by selecting page 0x3F with the PPAGE register. The contents of this
byte are copied into the Flash security register (FSEC) during a reset sequence.
The meaning of the bits KEYEN[1:0] is shown in
the MCU Using the Backdoor Key Access”
348
1. Availability of Flash arrays in the memory map depends on ROMCTL/EROMCTL pins and/or the state of the
2. Restricted NVM command set only. Please refer to the NVM wrapper block guides for detailed information.
3. BDM hardware commands restricted to peripheral registers only.
Internal accesses visible
EEPROM Array Access
ROMON/EROMON bits in the MMCCTL1 register. Please refer to the S12X_MMC block guide for detailed
information.
External Bus Interface
Internal status visible
Flash Array Access
DBG Module Trace
XGATE Debugging
NVM Commands
0xFF0F
gives an overview over availability of security relevant features in unsecure and secure modes.
on external bus
multiplexed on
external bus
Modes of Operation
Securing the Microcontroller
BDM
Table 9-2. Feature Availability in Unsecure and Secure Modes on S12XE
KEYEN1
7
KEYEN0
✔
NS
—
—
—
✔
✔
✔
✔
✔
(2)
MC9S12XE-Family Reference Manual Rev. 1.25
6
Figure 9-1. Flash Options/Security Byte
SS
—
—
—
✔
✔
✔
✔
✔
✔
Unsecure Mode
NV5
✔
5
NX
✔
—
—
✔
✔
✔
✔
✔
(1)
2
for more information.
ES
✔
✔
—
✔
✔
✔
✔
✔
✔
1
2
NV4
Table
4
EX
✔
✔
—
✔
✔
✔
✔
✔
✔
1
2
9-3. Please refer to
NV3
ST
✔
—
✔
✔
✔
✔
✔
✔
✔
3
1
NS
✔
—
—
—
—
—
—
✔
✔
2
NV2
2
✔
SS
✔
—
—
—
—
—
✔
✔
(3)
2
Section 9.1.5.1, “Unsecuring
Secure Mode
NX
✔
—
—
—
—
—
—
—
✔
SEC1
2
1
Freescale Semiconductor
ES
✔
—
—
—
—
—
—
✔
✔
2
SEC0
EX
✔
—
—
—
—
—
—
✔
✔
0
2
ST
✔
—
—
—
—
—
—
✔
✔
2
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