S912XEP768J5MAGR Freescale Semiconductor, S912XEP768J5MAGR Datasheet - Page 255

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S912XEP768J5MAGR

Manufacturer Part Number
S912XEP768J5MAGR
Description
16-bit Microcontrollers - MCU 16-bit 768K Flash
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XEP768J5MAGR

Rohs
yes
Core
HCS12X
Processor Series
MC9S12
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
768 KB
Data Ram Size
48 KB
On-chip Adc
Yes
Operating Supply Voltage
3.3 V to 5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-144
Mounting Style
SMD/SMT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S912XEP768J5MAGR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
internal RAM and misaligned XGATE PRR accesses in emulation modes are the only type of access that
are able to produce LSTRB = ADDR0 = 1. This is summarized in
Freescale Semiconductor
Word write of data on DATA[15:0] at an even and even+1
address
Byte write of data on DATA[7:0] at an odd address
Byte write of data on DATA[15:8] at an even address
Word write at an odd and odd+1 internal RAM address
(misaligned — only in emulation modes)
Word read of data on DATA[15:0] at an even and even+1
address
Byte read of data on DATA[7:0] at an odd address
Byte read of data on DATA[15:8] at an even address
Word read at an odd and odd+1 internal RAM address
(misaligned - only in emulation modes)
Table 5-20. Access in Emulation Modes and Special Test Mode
Access
MC9S12XE-Family Reference Manual Rev. 1.25
RW LSTRB ADDR0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
Table
0
1
0
1
0
1
0
1
Chapter 5 External Bus Interface (S12XEBIV4)
Out
Out
Out data(odd+1) Out
I/O
5-20.
In
In
In
In
In
DATA[15:8]
data(odd+1)
data(addr)
data(even)
data(even)
data(even)
data(odd)
x
x
Out
Out
I/O
In
In
In
In
In
DATA[7:0]
data(even+1)
data(addr)
data(odd)
data(odd)
data(odd)
data(odd)
data(odd)
x
x
255

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