DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 145
DS26519GA2
Manufacturer Part Number
DS26519GA2
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS26519GA2.pdf
(310 pages)
Specifications of DS26519GA2
Part # Aliases
90-26519-0A2
- Current page: 145 of 310
- Download datasheet (3Mb)
Register Name:
Register Description:
Register Address:
Channels:
Bit #
Name
Default
The GBISR1 register reports the interrupt status for the T1/E1 bit error rate testers (BERT) of Channels 1 to 8. A
logic one in the associated bit location indicates a BERT has set its interrupt signal.
Bit 7: BERT Interrupt Status 8 (BIS8)
Bit 6: BERT Interrupt Status 7 (BIS7)
Bit 5: BERT Interrupt Status 6 (BIS6)
Bit 4: BERT Interrupt Status 5 (BIS5)
Bit 3: BERT Interrupt Status 4 (BIS4)
Bit 2: BERT Interrupt Status 3 (BIS3)
Bit 1 : BERT Interrupt Status 2 (BIS2)
Bit 0: BERT Interrupt Status 1 (BIS1)
0 = BERT 8 has not issued an interrupt.
1 = BERT 8 has issued an interrupt.
0 = BERT 7 has not issued an interrupt.
1 = BERT 7 has issued an interrupt.
0 = BERT 6 has not issued an interrupt.
1 = BERT 6 has issued an interrupt.
0 = BERT 5 has not issued an interrupt.
1 = BERT 5 has issued an interrupt.
0 = BERT 4 has not issued an interrupt.
1 = BERT 4 has issued an interrupt.
0 = BERT 3 has not issued an interrupt.
1 = BERT 3 has issued an interrupt.
0 = BERT 2 has not issued an interrupt.
1 = BERT 2 has issued an interrupt.
0 = BERT 1 has not issued an interrupt.
1 = BERT 1 has issued an interrupt.
BIS8
7
0
GBISR1
Global BERT Interrupt Status Register 1
00FAh
1 to 8
BIS7
6
0
BIS6
5
0
145 of 310
BIS5
4
0
BIS4
3
0
DS26519 16-Port T1/E1/J1 Transceiver
BIS3
2
0
BIS2
1
0
BIS1
0
0
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