DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 302

• Manufacturer Part Number: DS26519GA2
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26519GA2

• Part # Aliases: 90-26519-0A2

14.
The DS26519 IEEE 1149.1 design supports the standard instruction codes SAMPLE:PRELOAD, BYPASS, and
EXTEST. Optional public instructions included are HIGHZ, CLAMP, and IDCODE. See
contains the following as required by IEEE 1149.1 Standard Test Access Port and Boundary Scan Architecture.
The Test Access Port has the necessary interface pins: JTRST , JTCLK, JTMS, JTDI, and JTDO. See the pin
descriptions for details.
Figure 14-1. JTAG Functional Block Diagram
JTAG BOUNDARY SCAN AND TEST ACCESS PORT
Test Access Port (TAP)
TAP Controller
Instruction Register
10k Ω
V
DD
JTDI
10k Ω
V
DD
JTMS
TEST ACCESS PORT
BOUNDRY SCAN
IDENTIFICATION
CONTROLLER
INSTRUCTION
REGISTER
REGISTER
REGISTER
REGISTER
BYPASS
JTCLK
302 of 310
10k Ω
V
DD
JTRST
SELECT
OUTPUT ENABLE
Bypass Register
Boundary Scan Register
Device Identification Register
MUX
DS26519 16-Port T1/E1/J1 Transceiver
Table
JTDO
14-1. The DS26519