DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 249
DS26519GA2
Manufacturer Part Number
DS26519GA2
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS26519GA2.pdf
(310 pages)
Specifications of DS26519GA2
Part # Aliases
90-26519-0A2
- Current page: 249 of 310
- Download datasheet (3Mb)
Register Name:
Register Description:
Register Address:
Bit #
Name
Setting any of the CH[1:32] bits in the TBPCS1 to TBPCS4 registers will enable the transmit BERT clock for the
associated channel time, and allow mapping of the selected channel data out of the receive BERT port. Multiple or
all channels may be selected simultaneously.
(MSB)
CH16
CH24
CH32
CH8
7
CH15
CH23
CH31
CH7
TBPCS1, TBPCS2, TBPCS3, TBPCS4
Transmit BERT Port Channel Select Registers
1D4h, 1D5h, 1D6h, 1D7h + (200h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16
6
CH14
CH22
CH30
CH6
5
CH13
CH21
CH29
CH5
4
249 of 310
CH12
CH20
CH28
CH4
3
CH11
CH19
CH27
CH3
2
DS26519 16-Port T1/E1/J1 Transceiver
CH10
CH18
CH26
CH2
1
(LSB)
CH17
CH25
CH1
CH9
0
TBPCS1
TBPCS2
TBPCS3
TBPCS4
(E1 Mode
Only)
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