DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 157
![no-image](/images/no-image-200.jpg)
DS26519GA2
Manufacturer Part Number
DS26519GA2
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS26519GA2.pdf
(310 pages)
Specifications of DS26519GA2
Part # Aliases
90-26519-0A2
- Current page: 157 of 310
- Download datasheet (3Mb)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: Receive Channel Bit 8 Suppress (BSE8). MSB of the channel. Set to one to stop this bit from being used.
Bit 6: Receive Channel Bit 7 Suppress (BSE7). Set to one to stop this bit from being used.
Bit 5: Receive Channel Bit 6 Suppress (BSE6). Set to one to stop this bit from being used.
Bit 4: Receive Channel Bit 5 Suppress (BSE5). Set to one to stop this bit from being used.
Bit 3: Receive Channel Bit 4 Suppress (BSE4). Set to one to stop this bit from being used.
Bit 2: Receive Channel Bit 3 Suppress (BSE3). Set to one to stop this bit from being used.
Bit 1: Receive Channel Bit 2 Suppress (BSE2). Set to one to stop this bit from being used.
Bit 0: Receive Channel Bit 1 Suppress (BSE1). LSB of the channel. Set to one to stop this bit from being used.
BSE8
7
0
RHBSE
Receive HDLC Bit Suppress Register
011h + (200h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16
BSE7
6
0
BSE6
5
0
157 of 310
BSE5
4
0
BSE4
3
0
DS26519 16-Port T1/E1/J1 Transceiver
BSE3
2
0
BSE2
1
0
BSE1
0
0
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