DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 290

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DS26519GA2

Manufacturer Part Number
DS26519GA2
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet

Specifications of DS26519GA2

Part # Aliases
90-26519-0A2
Figure 13-1. SPI Interface Timing Diagram
SPI_SCLK
NOTE 1: CLOCK EDGE REFERENCE TO DATA CONTROLLED BY CPHA AND CPOL SETTINGS. SEE THE FUNCTIONAL
TIMING DIAGRAMS.
NOTE 2: NOT DEFINED, BUT USUALLY MSB OF CHARACTER JUST RECEIVED.
SPI_SCLK
OUTPUT
INPUT
MOSI
MISO
INPUT
CSB
1
t2
t6
MSB
t7
t4
t1
t5
BIT 14
290 of 310
BITS
13:0
SLAVE
MSB
t9
DS26519 16-Port T1/E1/J1 Transceiver
BITS 6:1
t10
SLAVE
LSB
t3
NOTE 2
t8

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