DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 227
DS26519GA2
Manufacturer Part Number
DS26519GA2
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS26519GA2.pdf
(310 pages)
Specifications of DS26519GA2
Part # Aliases
90-26519-0A2
- Current page: 227 of 310
- Download datasheet (3Mb)
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 7: Framer Enable (FRM_EN). This bit must be set to the desired state before writing INIT_DONE.
Bit 6: Initialization Done (INIT_DONE). The user must set this bit once he has written the configuration registers.
The host is required to write or clear all device registers prior to setting this bit. Once INIT_DONE is set, the
DS26519 will check the FRM_EN bit and, if enabled, will begin operation based on the initial configuration.
Bit 1: Soft Reset (SFTRST). Level sensitive “soft” reset. Should be taken high, then low to reset the transceiver.
Note: This reset does not clear the registers.
Bit 0: Transmitter T1/E1 Mode Select (T1/E1). Sets operating mode for transmitter only! This bit must be written
with the desired value prior to setting INIT_DONE.
0 = Framer disabled—held in low-power state.
1 = Framer enabled—all features active.
0 = Normal operation.
1 = Reset the transceiver.
0 = T1 operation.
1 = E1 operation.
FRM_EN
7
0
INIT_DONE
TMMR
Transmit Master Mode Register
180h + (200h x (n - 1)) + (2000h x [(n - 1) / 8]): where n = 1 to 16
6
0
—
5
0
227 of 310
—
4
0
—
3
0
DS26519 16-Port T1/E1/J1 Transceiver
—
2
0
SFTRST
1
0
T1/E1
0
0
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