DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 40

• Manufacturer Part Number: DS26519GA2
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated

Specifications of DS26519GA2

• Part # Aliases: 90-26519-0A2

9.5
All 16 framers share a common microprocessor port and a common MCLK. There are two common software-
configurable BPCLK outputs (BPCLK[2:1]. A set of global registers includes global resets, global interrupt status,
interrupt masking, clock configuration, and the device ID register. See the global register bit map in
common JTAG controller is used for all ports.
9.5.1 General-Purpose I/O Pins
The DS26519 has 16 GPIO pins (see
to output alarm status or be used as an input. GPIO[8:1] are globally controlled as a group, and GPIO[16:9] are a
second globally controlled group. Therefore, all GPIOs in a group output the same function.
mux control of the GPIO pins.
Figure 9-10. GPIO Mux Control
9.6
Each port has an associated framer, LIU, BERT, jitter attenuator, and transmit/receive HDLC controller. Each of the
per-port functions has its own register space.
Global Resources
Per-Port Resources
RLOFm
LOTCm
ALOSm
FLOSm
RLOFn
LOTCn
ALOSn
FLOSn
NOTE: n REFERS TO PORTS 1–8 AND m REFERS TO PORTS 9–16.
RLOFLTC
RLOFLTC
GTCR1.
GTCR2.
GTCR3.
GTCR4.
LOSS
LOSS
RSIGFm
RSIGFn
RLOSSFS
RLOSSFS
GFCR1.
GFCR2.
GPIORR1
'0' '1'
'0' '1'
and GPIORR2). Each pin is assigned to one port and can be used
GPSEL[1:0]
GPSEL[1:0]
GTCR1.
GTCR2.
40 of 310
GPSEL2
GPSEL2
GTCR1.
GTCR2.
GPIORR1.
GPIORR2.
bit (m-1)
bit (n-1)
DS26519 16-Port T1/E1/J1 Transceiver
GPIOm
GPIOn
Table 9-10
Table
shows the
10-7. A