DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 39
![no-image](/images/no-image-200.jpg)
DS26519GA2
Manufacturer Part Number
DS26519GA2
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS26519GA2.pdf
(310 pages)
Specifications of DS26519GA2
Part # Aliases
90-26519-0A2
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DS26519 16-Port T1/E1/J1 Transceiver
9.4
Initialization and Configuration
9.4.1 Example Device Initialization and Sequence
STEP 1: Reset the device by pulling the RESETB pin low, applying power to the device, or by using the software
reset bits outlined in Section 9.2.2. Clear all reset bits. Allow time for the reset recovery.
STEP 2: Check the Device ID in the
IDR
register.
STEP 3: Write the
GTCCR1
register to correctly configure the system clocks. If supplying a 1.544MHz MCLK
follows this write with at least a 300ns delay in order to allow the clock system to properly adjust.
STEP 4: Write the entire remainder of the register space for each port with 00h, including reserved register
locations.
STEP 5: Choose T1/J1 or E1 operation for the framers by configuring the T1/E1 bit in the
TMMR
and
RMMR
registers for each framer. Set the FRM_EN bit to 1 in the
TMMR
and
RMMR
registers. If using software transmit
signaling in E1 mode, program the
E1TAF
and
E1TNAF
registers as required. Configure the framer Transmit
Control Registers (TCR1–TCR4). Configure the framer Receive Control Registers (RCR1–RCR3). Configure other
framer features as appropriate.
STEP 6: Choose T1/J1 or E1 operation for the LIUs by configuring the T1J1E1S bit in the
LTRCR
register.
Configure the line build-out for each LIU. Configure other LIU features as appropriate. Set the TE (transmit enable)
bit to turn on the TTIPn and TRINGn outputs.
STEP 7: Configure the elastic stores, HDLC controller, and BERT as needed.
STEP 8: Set the INIT_DONE bit in the
TMMR
and
RMMR
registers for each framer.
39 of 310
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