DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 38
DS26519GA2
Manufacturer Part Number
DS26519GA2
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS26519GA2.pdf
(310 pages)
Specifications of DS26519GA2
Part # Aliases
90-26519-0A2
- Current page: 38 of 310
- Download datasheet (3Mb)
9.3
A hardware reset is issued by forcing the RESETB pin to logic low. The RESETB input pin resets all framers, LIUs,
and BERTs. Note that not all registers are cleared to 00h on a reset condition. The register space must be
reinitialized to appropriate values after a hardware or software reset has occurred. This includes writing
reserved locations to 00h.
Table 9-2. Reset Functions
Hardware Device Reset
Hardware JTAG Reset
Global Software Reset
Framer Receive Reset
Framer Transmit Reset
HDLC Receive Reset
HDLC Transmit Reset
Elastic Store Receive Reset
Elastic Store Transmit Reset
Bit Oriented Code Receive
Reset
Loop Code Integration Reset
Spare Code Integration Reset
The DS26519 has several features included to reduce power consumption. The individual LIU transmitters can be
powered down by setting the TPDE bit in the LIU Maintenance Control Register (LMCR). Note that powering down
the transmit LIU results in a high-impedance state for the corresponding TTIPn and TRINGn pins and reduced
operating current. The RPDE in the
The TE (transmit enable) bit in the
them in a high-impedance mode, while keeping the LIU in an active state (powered up). This is useful for
equipment protection-switching applications.
RESET FUNCTION
Resets and Power-Down Modes
LMCR
GSRR1,
LMCR
T1RBOCC.7
T1RDNCD1,
RESETB Pin
T1RUPCD1
LOCATION
JTRST Pin
T1RSCD1
RESCR.2
TESCR.2
RMMR.1
TMMR.1
THC1.5
RHC.6
register can be used to disable the TTIPn and TRINGn outputs and place
register can be used to power down the LIU receiver.
GSRR2
38 of 310
Transition to a logic 0 level resets the DS26519.
Resets the JTAG test port.
Writing to these registers resets the framers, LIUs and
BERTs (transmit and receive).
Writing to this bit resets the receive framer.
Writing to this bit resets the transmit framer.
Writing to this bit resets the receive HDLC controller.
Writing to this bit resets the transmit HDLC controller.
Writing to this bit resets the receive elastic store.
Writing to this bit resets the transmit elastic store.
Writing to this bit resets the receive BOC controller.
Writing to these registers resets the programmable in-band
code integration period.
Writing to this register resets the programmable in-band
code integration period.
DS26519 16-Port T1/E1/J1 Transceiver
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