DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 25
DS26519GA2
Manufacturer Part Number
DS26519GA2
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet
1.DS26519GA2.pdf
(310 pages)
Specifications of DS26519GA2
Part # Aliases
90-26519-0A2
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RSYSCLK10
RSYSCLK11
RSYSCLK12
RSYSCLK13
RSYSCLK14
RSYSCLK15
RSYSCLK16
RSYSCLK1
RSYSCLK2
RSYSCLK3
RSYSCLK4
RSYSCLK5
RSYSCLK6
RSYSCLK7
RSYSCLK8
RSYSCLK9
RSER10
RSER11
RSER12
RSER13
RSER14
RSER15
RSER16
RCLK10
RCLK11
RCLK12
RCLK13
RCLK14
RCLK15
RCLK16
RSER1
RSER2
RSER3
RSER4
RSER5
RSER6
RSER7
RSER8
RSER9
RCLK1
RCLK2
RCLK3
RCLK4
RCLK5
RCLK6
RCLK7
RCLK8
RCLK9
NAME
AA10
AB10
AA22
W20
M16
AB7
G15
D12
E12
AA4
Y10
B18
H13
U19
V20
R15
N15
U18
C19
P18
AB2
PIN
T20
L17
L16
T15
T17
T18
T19
W7
H7
H6
D3
C2
H3
G3
G9
G6
R7
B1
K7
P7
F2
P8
J5
J4
J9
J8
J6
Output
Ouput
TYPE
Input
Received Serial Data 1 to 16. Received NRZ serial data. Updated on rising
edges of RCLKn when the receive-side elastic store is disabled. Updated on the
rising edges of RSYSCLKn when the receive-side elastic store is enabled.
When IBO mode is used, the RSERn pins can output data for multiple framers.
The RSERn data is synchronous to RSYSCLKn. See Section
9-6.
Receive Clock. A 1.544MHz (T1) or 2.048MHz (E1) clock that is used to clock
data through the receive-side framer. This clock is recovered from the signal at
RTIPn and RRINGn. RSERn data is output on the rising edge of RCLKn. RCLKn
is used to output RSERn when the elastic store is not enabled or IBO is not used.
When the elastic store is enabled or IBO is used, the RSERn is clocked by
RSYSCLKn.
Receive System Clock 1 to 16. 1.544MHz, 2.048MHz, 4.096MHz, 8.192MHz, or
16.384MHz receive backplane clock. Only used when the receive-side elastic
store function is enabled. Should be tied low in applications that do not use the
receive-side elastic store. Multiple of 2.048MHz is expected when the IBO mode
is used.
RECEIVE FRAMER
25 of 310
FUNCTION
DS26519 16-Port T1/E1/J1 Transceiver
9.8.2
and
Table
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