DS26519GA2 Maxim Integrated, DS26519GA2 Datasheet - Page 146

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DS26519GA2

Manufacturer Part Number
DS26519GA2
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated
Datasheet

Specifications of DS26519GA2

Part # Aliases
90-26519-0A2
Register Name:
Register Description:
Register Address:
Channels:
Bit #
Name
Default
The GBISR2 register reports the interrupt status for the T1/E1 bit error rate testers (BERT) of Channels 9 to 16. A
logic one in the associated bit location indicates a BERT has set its interrupt signal.
Bit 7: BERT Interrupt Status 16 (BIS16)
Bit 6: BERT Interrupt Status 15 (BIS15)
Bit 5: BERT Interrupt Status 14 (BIS14)
Bit 4: BERT Interrupt Status 13 (BIS13)
Bit 3: BERT Interrupt Status 12 (BIS12)
Bit 2: BERT Interrupt Status 11 (BIS11)
Bit 1 : BERT Interrupt Status 10 (BIS10)
Bit 0: BERT Interrupt Status 9 (BIS9)
0 = BERT 16 has not issued an interrupt.
1 = BERT 16 has issued an interrupt.
0 = BERT 15 has not issued an interrupt.
1 = BERT 15 has issued an interrupt.
0 = BERT 14 has not issued an interrupt.
1 = BERT 14 has issued an interrupt.
0 = BERT 13 has not issued an interrupt.
1 = BERT 13 has issued an interrupt.
0 = BERT 12 has not issued an interrupt.
1 = BERT 12 has issued an interrupt.
0 = BERT 11 has not issued an interrupt.
1 = BERT 11 has issued an interrupt.
0 = BERT 10 has not issued an interrupt.
1 = BERT 10 has issued an interrupt.
0 = BERT 9 has not issued an interrupt.
1 = BERT 9 has issued an interrupt.
BIS16
7
0
GBISR2
Global BERT Interrupt Status Register 2
20FAh
9 to 16
BIS15
6
0
BIS14
5
0
146 of 310
BIS13
4
0
BIS13
3
0
DS26519 16-Port T1/E1/J1 Transceiver
BIS11
2
0
BIS10
1
0
BIS9
0
0

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