MT45W8MW16BGX-708 WT TR Micron Technology Inc, MT45W8MW16BGX-708 WT TR Datasheet - Page 20

• Manufacturer Part Number: MT45W8MW16BGX-708 WT TR
• Description: IC PSRAM 128MBIT 70NS 54VFBGA
• Manufacturer: Micron Technology Inc

Specifications of MT45W8MW16BGX-708 WT TR

• Format - Memory: RAM
• Memory Type: PSRAM (Page)
• Memory Size: 128M (8Mx16)
• Speed: 70ns
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.95 V
• Operating Temperature: -30°C ~ 85°C
• Package / Case: 54-VFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1010-2

Bus Configuration Register
acts with the system memory bus. Page mode opera-
tion is enabled by a bit contained in the RCR. Figure 18
describes the control bits in the BCR. At power-up, the
BCR is set to 9D1Fh.
NOTE:
09005aef80ec6f79 pdf/09005aef80ec6f65 zip
Burst CellularRAM 1.5_128Mb__2.fm - Rev. D 2/05 EN
1.
The BCR defines how the CellularRAM device inter-
Burst wrap and length apply to both READ and WRITE operations
All must be set to "0"
BCR[19]
Reserved
A[22:20]
22–20
0
1
0
BCR[15]
BCR[18]
Register
0
1
Select
A[19:18]
19–18
0
0
1
BCR[13]
Must be set to "0"
BCR[14]
0
0
0
0
1
1
1
1
0
1
Synchronous burst access mode
Asynchronous access mode (default)
Reserved
Select RCR
Select BCR
Select DIDR
17–16
Figure 18: Bus Configuration Register Definition
A[17:16]
BCR[12] BCR[11]
BCR[10]
0
0
1
1
0
0
1
1
Fixed
Variable (default)
Register Select
Operating Mode
0
1
Operating
Initial Access Latency
Mode
15
A15
0
1
0
1
0
1
0
1
Active LOW
Active HIGH (default)
Latency
Initial
Code 0–Reserved
Code 1–Reserved
Code 2
Code 3 (Default)
Code 4
Code 5
Code 6
Code 7–Reserved
14
Latency Counter
A14
WAIT Polarity
A13
13 12 11
ASYNC/PAGE/BURST CellularRAM 1.5 MEMORY
Counter
Latency
A12A11 A10
Polarity
WAIT
10
Must be set to "0"
Reserved
9
A9
Configuration (WC)
20
.
BCR[8]
WAIT
0
1
10b, or through the register access software sequence
with DQ = 0001h on the third cycle.
8
A8
The BCR is accessed with CRE HIGH and A[19:18] =
Must be set to "0"
Asserted one data cycle before delay (default)
Asserted during delay
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Reserved
7
A7
BCR[5]
WAIT Configuration
0
0
1
1
Setting is ignored
(Default to "0")
BCR[3]
0
1
Reserved
BCR[4]
BCR[2]
0
1
0
1
6
0
0
0
1
1
A6
Burst wraps within the burst length
Burst no wrap (default)
Others
BCR[1] BCR[0]
1/2 (default)
1/4
Reserved
Full
0
1
1
0
1
Drive Strength
Drive Strength
5
A5
Burst Wrap (Note 1)
1
0
1
0
1
©2004 Micron Technology, Inc. All rights reserved.
4 words
8 words
16 words
32 words
Continuous burst (default)
Reserved
4
A4
Burst Length (Note 1)
8 MEG x 16
Wrap (BW)*
Burst
3
A3
Length (BL)*
2
A2 A1 A0
Burst
1
0